Xilinx / finn-baseLinks
Open Source Compiler Framework using ONNX as Frontend and IR
☆32Updated 2 years ago
Alternatives and similar repositories for finn-base
Users that are interested in finn-base are comparing it to the libraries listed below
Sorting:
- Train and deploy LUT-based neural networks on FPGAs☆97Updated last year
- ☆58Updated 5 years ago
- Quantized ResNet50 Dataflow Acceleration on Alveo, with PYNQ☆58Updated 3 years ago
- SAMO: Streaming Architecture Mapping Optimisation☆33Updated last year
- Designs for finalist teams of the DAC System Design Contest☆37Updated 5 years ago
- DAC System Design Contest 2020☆29Updated 5 years ago
- ☆37Updated 3 years ago
- BISMO: A Scalable Bit-Serial Matrix Multiplication Overlay for Reconfigurable Computing☆139Updated 5 years ago
- ☆30Updated 8 months ago
- ☆71Updated 5 years ago
- ☆71Updated 2 years ago
- Open Source Specialized Computing Stack for Accelerating Deep Neural Networks.☆216Updated 6 years ago
- Residual Binarized Neural Network☆43Updated 7 years ago
- NeuraLUT: Hiding Neural Network Density in Boolean Synthesizable Functions☆37Updated 3 months ago
- Generate versal system design from ONNX model. AI engine kernels. Sub-microsecond speeds for autoencoders.☆14Updated 6 months ago
- Vitis HLS Library for FINN☆202Updated 3 weeks ago
- ☆23Updated 3 years ago
- ☆82Updated last year
- Eyeriss chip simulator☆36Updated 5 years ago
- FlexASR: A Reconfigurable Hardware Accelerator for Attention-based Seq-to-Seq Networks☆46Updated 4 months ago
- Performance and resource models for fpgaConvNet: a Streaming-Architecture-based CNN Accelerator.☆29Updated 8 months ago
- Provides the hardware code for the paper "EBPC: Extended Bit-Plane Compression for Deep Neural Network Inference and Training Accelerator…☆24Updated 5 years ago
- ☆33Updated 6 years ago
- Approximate layers - TensorFlow extension☆27Updated 3 months ago
- Caffe to VHDL☆67Updated 5 years ago
- ☆23Updated 2 years ago
- Matrix Operation Library for FPGA https://xilinx.github.io/gemx/☆63Updated 5 years ago
- A DSL for Systolic Arrays☆80Updated 6 years ago
- Fast inference of Boosted Decision Trees in FPGAs☆54Updated last month
- Fork of upstream onnxruntime focused on supporting risc-v accelerators☆88Updated 2 years ago