Alternatives and similar repositories for fpgaconvnet-tutorial

Users that are interested in fpgaconvnet-tutorial are comparing it to the libraries listed below

• cornell-zhang / FracBNN
  FracBNN: Accurate and FPGA-Efficient Binary Neural Networks with Fractional Activations
  ☆95Updated 4 years ago
• cjg91 / trans-fat
  An FPGA Accelerator for Transformer Inference
  ☆92Updated 3 years ago
• xliu0709 / WinoCNN
  An HLS based winograd systolic CNN accelerator
  ☆54Updated 4 years ago
• hguq / HG-PIPE
  FPGA-based hardware accelerator for Vision Transformer (ViT), with Hybrid-Grained Pipeline.
  ☆108Updated 10 months ago
• 8krisv / CNN-ACCELERATOR
  Hardware accelerator for convolutional neural networks
  ☆60Updated 3 years ago
• FedericoSerafini / HLS-CNN
  High Level Synthesis of a trained Convolutional Neural Network for handwritten digit recongnition.
  ☆41Updated last year
• mustard-seed / SparseDNNAccelerator
  Sparse CNN Accelerator targeting Intel FPGA
  ☆12Updated 4 years ago
• Xilinx / ResNet50-PYNQ
  Quantized ResNet50 Dataflow Acceleration on Alveo, with PYNQ
  ☆60Updated 4 years ago
• fffasttime / AnyPackingNet
  ☆31Updated 8 months ago
• user-xleo / DNN-Accelerator
  A DNN Accelerator implemented with RTL.
  ☆68Updated 10 months ago
• arasi15 / CNN-Accelerator-Implementation-based-on-Eyerissv2
  ☆121Updated 5 years ago
• albertomarchisio / SwiftTron
  ☆46Updated 2 years ago
• gnodipac886 / ViT-FPGA-TPU
  FPGA based Vision Transformer accelerator (Harvard CS205)
  ☆137Updated 9 months ago
• heheda365 / ultra_net
  FPGA-based neural network inference project for 2020 DAC System Design Contest
  ☆115Updated 4 years ago
• CASR-HKU / MSD-FCCM23
  Open-source of MSD framework
  ☆16Updated 2 years ago
• jiangwx / SkrSkr
  The second place winner for DAC-SDC 2020
  ☆98Updated 3 years ago
• xliu0709 / DACSDC2021
  ☆11Updated last year
• Xilinx / finn-hlslib
  Vitis HLS Library for FINN
  ☆210Updated 2 months ago
• AlexMontgomerie / fpgaconvnet-model
  Performance and resource models for fpgaConvNet: a Streaming-Architecture-based CNN Accelerator.
  ☆30Updated last year
• Fiwo735 / Transformer_Neural_Network_HLS
  ☆14Updated 3 years ago
• ac-optimus / Convolution-using-systolic-arrays
  ☆71Updated 6 years ago
• Yang-YiFan / DiracDeltaNet
  PyTorch implementation of DiracDeltaNet from paper Synetgy: Algorithm-hardware Co-design for ConvNet Accelerators on Embedded FPGAs
  ☆33Updated 6 years ago
• amiq-consulting / CNN-using-HLS
  Convolutional Neural Network Using High Level Synthesis
  ☆90Updated 5 years ago
• MartaAndronic / PolyLUT
  PolyLUT is the first quantized neural network training methodology that maps a neuron to a LUT while using multivariate polynomial functi…
  ☆54Updated last year
• jgoeders / dac_sdc_2020_designs
  Designs for finalist teams of the DAC System Design Contest
  ☆37Updated 5 years ago
• ralbertazzi / bnn
  Training and Implementation of a CNN for image classification with binary weights and activations on FPGA with HLS tools
  ☆52Updated 7 years ago
• maomran / softmax
  Verilog implementation of Softmax function
  ☆77Updated 3 years ago
• sherylll / lenet5-accelerator
  FPGA and GPU acceleration of LeNet5
  ☆34Updated 6 years ago
• jonathan93sh / CNNA
  A generic Convolutional Neural Network (CNN) Accelerator (CNNA) for FPGA
  ☆27Updated 4 years ago
• DPCEKY / systolic-array
  HLS implemented systolic array structure
  ☆41Updated 8 years ago