SAITPublic / PIMSimulator
Processing-In-Memory (PIM) Simulator
☆153Updated 3 months ago
Alternatives and similar repositories for PIMSimulator:
Users that are interested in PIMSimulator are comparing it to the libraries listed below
- ☆58Updated 9 months ago
- NeuPIMs Simulator☆75Updated 9 months ago
- ☆131Updated last month
- ONNXim is a fast cycle-level simulator that can model multi-core NPUs for DNN inference☆99Updated last month
- PIMSim is a Process-In-Memory Simulator with the compatibility of GEM5 full-system simulation.☆195Updated last year
- A fast and flexible simulation infrastructure for exploring general-purpose processing-in-memory (PIM) architectures. Ramulator-PIM combi…☆156Updated 2 years ago
- DAMOV is a benchmark suite and a methodical framework targeting the study of data movement bottlenecks in modern applications. It is inte…☆81Updated last year
- PrIM (Processing-In-Memory benchmarks) is the first benchmark suite for a real-world processing-in-memory (PIM) architecture. PrIM is dev…☆152Updated 10 months ago
- MultiPIM: A Detailed and Configurable Multi-Stack Processing-In-Memory Simulator☆53Updated 3 years ago
- Artifact for paper "PIM is All You Need: A CXL-Enabled GPU-Free System for LLM Inference", ASPLOS 2025☆37Updated this week
- mNPUsim: A Cycle-accurate Multi-core NPU Simulator (IISWC 2023)☆48Updated 3 months ago
- ☆17Updated last year
- STONNE: A Simulation Tool for Neural Networks Engines☆125Updated 9 months ago
- UPMEM LLM Framework allows profiling PyTorch layers and functions and simulate those layers/functions with a given hardware profile.☆24Updated last month
- gem5 Tips & Tricks☆67Updated 5 years ago
- ☆29Updated 3 months ago
- Simulator framework for analysis of performance, energy consumption, area and cost of multi-node multi-chiplet tile-based manycore design…☆62Updated 8 months ago
- Open-source Framework for HPCA2024 paper: Gemini: Mapping and Architecture Co-exploration for Large-scale DNN Chiplet Accelerators☆75Updated 2 weeks ago
- End-to-end SoC simulation: integrating the gem5 system simulator with the Aladdin accelerator simulator.☆230Updated 2 years ago
- ☆66Updated 4 years ago
- [ASPLOS 2019] PUMA-simulator provides a detailed simulation model of a dataflow architecture built with NVM (non-volatile memory), and ru…☆62Updated last year
- ☆126Updated 8 months ago
- The framework for the paper "Inter-layer Scheduling Space Definition and Exploration for Tiled Accelerators" in ISCA 2023.☆65Updated last week
- An open-source parameterizable NPU generator with full-stack multi-target compilation stack for intelligent workloads.☆48Updated last week
- SMAUG: Simulating Machine Learning Applications Using Gem5-Aladdin☆107Updated 2 years ago
- Repository to host and maintain scale-sim-v2 code☆276Updated last week
- A scheduler for spatial DNN accelerators that generate high-performance schedules in one shot using mixed integer programming (MIP)☆79Updated last year
- A co-design architecture on sparse attention☆50Updated 3 years ago
- An integrated power, area, and timing modeling framework for multicore and manycore architectures☆180Updated 4 years ago
- Implementations of Buffets, which are efficient, composable idioms for implementing Explicit Decoupled Data Orchestration.☆69Updated 5 years ago