yonseicasl / NebulaLinks
Nebula: Deep Neural Network Benchmarks in C++
☆13Updated last year
Alternatives and similar repositories for Nebula
Users that are interested in Nebula are comparing it to the libraries listed below
Sorting:
- mNPUsim: A Cycle-accurate Multi-core NPU Simulator (IISWC 2023)☆71Updated last month
- The source code for GPGPUSim+Ramulator simulator. In this version, GPGPUSim uses Ramulator to simulate the DRAM. This simulator is used t…☆60Updated 6 years ago
- MultiPIM: A Detailed and Configurable Multi-Stack Processing-In-Memory Simulator☆56Updated 4 years ago
- ☆42Updated 10 months ago
- ☆109Updated last year
- ☆38Updated last year
- ☆11Updated last year
- dMazeRunner: Dataflow acceleration optimization infrastructure for coarse-grained programmable accelerators☆47Updated 3 years ago
- Replace original DRAM model in GPGPU-sim with Ramulator DRAM model☆21Updated 7 years ago
- Heterogeneous simulator for DECADES Project☆32Updated last year
- A Cycle-level simulator for M2NDP☆33Updated 5 months ago
- STONNE Simulator integrated into SST Simulator☆22Updated last year
- ☆81Updated 5 years ago
- High Bandwidth Memory (HBM) timing model based on DRAMSim2☆45Updated 8 years ago
- CasHMC: A Cycle-accurate Simulator for Hybrid Memory Cube☆23Updated 7 years ago
- MAERI: A DNN accelerator with reconfigurable interconnects to support flexible dataflow (http://synergy.ece.gatech.edu/tools/maeri/)☆67Updated 4 years ago
- gem5 repository to study chiplet-based systems☆86Updated 6 years ago
- NeuroSpector: Dataflow and Mapping Optimizer for Deep Neural Network Accelerators☆21Updated 10 months ago
- Heterogenous ML accelerator☆20Updated 9 months ago
- SimplePIM is the first high-level programming framework for real-world processing-in-memory (PIM) architectures. Described in the PACT 20…☆31Updated 2 years ago
- High-Performance Sparse Linear Algebra on HBM-Equipped FPGAs Using HLS☆95Updated last year
- The simulator for SPADA, an SpGEMM accelerator with adaptive dataflow☆47Updated 3 years ago
- agile hardware-software co-design☆52Updated 4 years ago
- Simulator framework for analysis of performance, energy consumption, area and cost of multi-node multi-chiplet tile-based manycore design…☆75Updated last year
- NPUsim: Full-Model, Cycle-Level, and Value-Aware Simulator for DNN Accelerators☆46Updated last year
- An open-source DRAM power model based on extensive experimental characterization of real DRAM modules. Described in the SIGMETRICS 2018 …☆40Updated 6 years ago
- PARADE: A Cycle-Accurate Full-System Simulation Platform for Accelerator-Rich Architectural Design and Exploration☆48Updated 3 years ago
- ☆29Updated 4 years ago
- MAFIA: Multiple Application Framework for GPU architectures☆28Updated 4 years ago
- Linux docker for the DNN accelerator exploration infrastructure composed of Accelergy and Timeloop☆62Updated 3 months ago