pgroupATusc / GraphACT
Implementation of paper "GraphACT: Accelerating GCN Training on CPU-FPGA Heterogeneous Platform".
☆10Updated 4 years ago
Alternatives and similar repositories for GraphACT
Users that are interested in GraphACT are comparing it to the libraries listed below
Sorting:
- [TECS'23] A project on the co-design of Accelerators and CNNs.☆20Updated 2 years ago
- An HBM FPGA based SpMV Accelerator☆12Updated 8 months ago
- An end-to-end GCN inference accelerator written in HLS☆19Updated 3 years ago
- SAURIA (Systolic-Array tensor Unit for aRtificial Intelligence Acceleration) is an open-source Convolutional Neural Network accelerator b…☆41Updated 7 months ago
- ☆16Updated 2 years ago
- Systolic Three Matrix Multiplier for Graph Convolutional Networks using High Level Synthesis☆22Updated 2 years ago
- ☆27Updated 5 years ago
- ☆35Updated 4 years ago
- ☆10Updated 2 years ago
- [DATE 2022] PowerGear: Early-Stage Power Estimation in FPGA HLS via Heterogeneous Edge-Centric GNNs☆17Updated 3 years ago
- [ASAP 2020; FPGA 2020] Hardware architecture to accelerate GNNs (common IP modules for minibatch training and full batch inference)☆41Updated 4 years ago
- ☆22Updated 2 years ago
- [TRETS'23, FPT'20] CHIP-KNN: Configurable and HIgh-Performance K-Nearest Neighbors Accelerator on Cloud FPGAs☆18Updated last year
- A Scalable BFS Accelerator on FPGA-HBM Platform☆14Updated last year
- ☆12Updated last year
- NeuraChip Accelerator Simulator☆11Updated last year
- HLS project modeling various sparse accelerators.☆12Updated 3 years ago
- A systolic array simulator for multi-cycle MACs and varying-byte words, with the paper accepted to HPCA 2022.☆77Updated 3 years ago
- CNN Accelerator in Frequency Domain☆12Updated 5 years ago
- ☆4Updated 4 years ago
- HLS for Networks-on-Chip☆34Updated 4 years ago
- tpu-systolic-array-weight-stationary☆24Updated 4 years ago
- ACM TODAES Best Paper Award, 2022☆23Updated last year
- ☆16Updated 7 months ago
- ☆14Updated last year
- ☆26Updated last month
- Contains FPGA benchmarks for Vivado HLS and Catapult HLS☆26Updated 4 years ago
- ☆16Updated 4 years ago
- Ratatoskr NoC Simulator☆25Updated 4 years ago
- DUTH RISC V Microprocessor for High Level Synthesis☆10Updated last year