The-OpenROAD-Project / ORAssistantLinks
OpenROAD's Chatbot Assistant
☆15Updated this week
Alternatives and similar repositories for ORAssistant
Users that are interested in ORAssistant are comparing it to the libraries listed below
Sorting:
- Source codes and calibration scripts for clock tree synthesis☆40Updated 5 years ago
- ☆22Updated 4 years ago
- Power grid analysis☆19Updated 4 years ago
- UCSD Sizer for leakage/dynamic power recovery, timing recovery☆18Updated 6 years ago
- ☆20Updated 3 years ago
- SystemVerilog RTL Linter for YoSys☆20Updated 6 months ago
- ☆44Updated 5 years ago
- Minimal SKY130 example with self-checking LVS, DRC, and PEX☆23Updated 4 years ago
- Intel's Analog Detailed Router☆38Updated 5 years ago
- SMT-based-STDCELL-Layout-Generator☆18Updated 3 years ago
- Macro placement tool for OpenROAD flow☆23Updated 4 years ago
- An open source PDK using TIGFET 10nm devices.☆48Updated 2 years ago
- Public repository for Task 6 of OpenROAD project. ML-based PDN synthesis and optimization.☆33Updated last year
- ☆25Updated this week
- ☆22Updated 3 weeks ago
- ☆31Updated 2 years ago
- ☆31Updated 3 years ago
- LibreSilicon's Standard Cell Library Generator☆18Updated last year
- ☆31Updated 4 years ago
- A Fast C++ Header-only Parser for Standard Parasitic Exchange Format (SPEF).☆55Updated 2 years ago
- tools regarding on analog modeling, validation, and generation☆22Updated 2 years ago
- Automatic generation of real number models from analog circuits☆40Updated last year
- ☆33Updated 5 years ago
- SMT-based Simultaneous Place-&-Route for Standard Cell Synthesis for PROBE 2.0☆18Updated 4 years ago
- Open source process design kit for 28nm open process☆56Updated last year
- sram/rram/mram.. compiler☆35Updated last year
- ☆44Updated last year
- Library of open source Process Design Kits (PDKs)☆42Updated this week
- Logic synthesis and ABC based optimization☆49Updated 3 weeks ago
- ☆24Updated 4 years ago