Papers on LLM4EDA from 2023 and 2024
☆47Jul 6, 2024Updated 2 years ago
Alternatives and similar repositories for EDA_LLM
Users that are interested in EDA_LLM are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- ☆292Jul 8, 2024Updated 2 years ago
- LLMs and the Future of Chip Design: Unveiling Security Risks and Building Trust☆40May 17, 2024Updated 2 years ago
- Fix syntax errors of LLM-generated RTL☆57May 23, 2024Updated 2 years ago
- ☆30Jan 30, 2025Updated last year
- Cell layout generation (MH Multiheight) for DTCO/STCO exploration toolkit.☆15Oct 6, 2025Updated 9 months ago
- Managed hosting for WordPress and PHP on Cloudways • AdManaged hosting for WordPress, Magento, Laravel, or PHP apps, on multiple cloud providers. Deploy in minutes on Cloudways by DigitalOcean.
- Generative Benchmark for LLM-Aided Hardware Design☆29Jun 4, 2025Updated last year
- RTL-Repo: A Benchmark for Evaluating LLMs on Large-Scale RTL Design Projects - IEEE LAD'24☆33Jun 5, 2024Updated 2 years ago
- Automated Repair of Verilog Hardware Descriptions☆39Jan 16, 2025Updated last year
- Fast Symbolic Repair of Hardware Design Code☆39Jan 20, 2025Updated last year
- ChatEDA: A Large Language Model Powered Autonomous Agent for EDA (TCAD'24, NAACL'25)☆57May 21, 2025Updated last year
- A SystemVerilog Assertion dataset to improve hardware verification with LLMs.☆26Jun 9, 2025Updated last year
- LLM Evaluation Benchmark on Hardware Formal Verification☆44Apr 3, 2025Updated last year
- ☆17Apr 19, 2026Updated 3 months ago
- Transactional Verilog design and Verilator Testbench for a RISC-V TensorCore Vector co-processor for reproducible linear algebra☆65Dec 19, 2021Updated 4 years ago
- End-to-end encrypted email - Proton Mail • AdSpecial offer: 40% Off Yearly / 80% Off First Month. All Proton services are open source and independently audited for security.
- Misc documentation and specifications☆14Feb 26, 2022Updated 4 years ago
- [DATE 2025] haven: hallucination-mitigated llm for verilog code generation aligned with hdl engineers☆43Jul 9, 2025Updated last year
- ☆208Oct 17, 2024Updated last year
- Annotating Slack Directly on Your Verilog: Fine-Grained RTL Timing Evaluation for Early Optimization☆44May 29, 2025Updated last year
- ☆31Jun 18, 2026Updated last month
- ☆19Jan 13, 2026Updated 6 months ago
- ☆174Mar 10, 2025Updated last year
- ☆24May 8, 2025Updated last year
- ☆32Oct 12, 2023Updated 2 years ago
- Deploy to Railway using AI coding agents - Free Credits Offer • AdUse Claude Code, Codex, OpenCode, and more. Autonomous software development now has the infrastructure to match with Railway.
- FOR FRESHMAN IN NUDT CORE LAB RESEARCH AND CODING TOOLS☆10Jun 19, 2022Updated 4 years ago
- This is the Github Repo for the paper: MCP4EDA: LLM-Powered Model Context Protocol RTL-to-GDSII Automation with Backend Aware Synthesis O…☆96Jul 29, 2025Updated 11 months ago
- A universal Sentaurus Workbench automated simulation and parameter optimization tool that combines DeepSeek AI and swbpy2, supporting Sen…☆23Apr 22, 2025Updated last year
- Open Source Detailed Placement engine☆13Feb 19, 2020Updated 6 years ago
- Used for hardware trojan detection（Based on Trust_Hub）☆10Jul 30, 2019Updated 6 years ago
- ICCD'24 paper: "AutoVCoder: A systematic framework for automated verilog code generation"☆25Dec 17, 2024Updated last year
- Reasoning LLMs optimized for Chisel code generation☆26Jun 19, 2025Updated last year
- ☆57Jul 13, 2026Updated last week
- Datasets for EDA LLM research☆46Jan 17, 2025Updated last year
- Deploy on Railway without the complexity - Free Credits Offer • AdConnect your repo and Railway handles the rest with instant previews. Quickly provision container image services, databases, and storage volumes.
- [DAC2024] Explainable Fuzzy Neural Network with Multi-Fidelity Reinforcement Learning for Micro-Architecture Design Space Exploration☆10Updated this week
- MasterRTL: A Pre-Synthesis PPA Estimation Framework for Any RTL Design☆73May 29, 2025Updated last year
- A new LLM solution for RTL code generation, achieving state-of-the-art performance in non-commercial solutions and outperforming GPT-3.5.☆310Feb 9, 2025Updated last year
- ☆48Jun 1, 2021Updated 5 years ago
- ☆39Aug 27, 2025Updated 10 months ago
- This is the Github Repo for the paper: VeriReason: Reinforcement Learning with Testbench Feedback for Reasoning-Enhanced Verilog Generati…☆29Sep 25, 2025Updated 9 months ago
- ☆37Sep 30, 2025Updated 9 months ago