TuRTLe: A Unified Evaluation of LLMs for RTL Generation 🐢 (MLCAD 2025)
☆44Feb 23, 2026Updated 4 months ago
Alternatives and similar repositories for TuRTLe
Users that are interested in TuRTLe are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- Administrative repository for the Integrated Matrix Extension Task Group☆36Apr 25, 2026Updated 2 months ago
- This repository includes the data and scripts utilized in the study titled "Improving LLM-based Verilog Code Generation with Data Augment…☆14Mar 24, 2025Updated last year
- ☆14Jun 12, 2024Updated 2 years ago
- This is the fork of CVA6 intended for PULP development.☆23Jun 27, 2026Updated last week
- CMake based hardware build system☆44Updated this week
- Proton VPN Special Offer - Get 70% off • AdSpecial partner offer. Trusted by over 100 million users worldwide. Tested, Approved and Recommended by Experts.
- Hop-Wise Graph Attention for Scalable and Generalizable Learning on Circuits☆35Aug 25, 2024Updated last year
- SystemVerilog FSM generator☆39May 10, 2026Updated last month
- Datasets for EDA LLM research☆45Jan 17, 2025Updated last year
- RISC-V vector and tensor compute extensions for Vortex GPGPU acceleration for ML workloads. Optimized for transformer models, CNNs, and g…☆24Apr 25, 2025Updated last year
- ☆36May 21, 2026Updated last month
- RISC-V Integrated Matrix Development Repository☆25Jun 22, 2026Updated last week
- ET Accelerator Firmware and Runtime☆46May 8, 2026Updated last month
- coursier CLI launchers☆15Jun 22, 2026Updated last week
- Parallel_Computer_Architecture经典书籍☆17May 13, 2022Updated 4 years ago
- Managed hosting for WordPress and PHP on Cloudways • AdManaged hosting for WordPress, Magento, Laravel, or PHP apps, on multiple cloud providers. Deploy in minutes on Cloudways by DigitalOcean.
- Backup: Library implementing a C TLM-2 style to bridge C models to SystemC TLM-2.0 (C++) from GreenSocs (https://git.greensocs.com/tlm/tl…☆19Aug 13, 2018Updated 7 years ago
- Verilog evaluation benchmark for large language model☆446Jul 14, 2025Updated 11 months ago
- ☆142Jun 8, 2026Updated 3 weeks ago
- Open-source AMBA CHI infrastructures (supporting Issue B, E.b)☆39Jun 23, 2026Updated last week
- CVA6 softcore contest☆24Apr 17, 2026Updated 2 months ago
- A tool for synthesizing Verilog programs☆116Aug 25, 2025Updated 10 months ago
- [AAAI 2025] The official code of the paper "InverseCoder: Unleashing the Power of Instruction-Tuned Code LLMs with Inverse-Instruct"(http…☆15Jul 10, 2024Updated last year
- SpecLLM: Exploring Generation and Review of VLSI Design Specification with Large Language Model☆16Jan 29, 2024Updated 2 years ago
- Benchmarks for Approximate Circuit Synthesis☆17Aug 2, 2020Updated 5 years ago
- Bare Metal GPUs on DigitalOcean Gradient AI • AdPurpose-built for serious AI teams training foundational models, running large-scale inference, and pushing the boundaries of what's possible.
- ☆12Jun 22, 2023Updated 3 years ago
- Examples in the MLX framework☆11Sep 23, 2024Updated last year
- The source code that empowers OpenROAD Cloud☆14Jun 29, 2020Updated 6 years ago
- Linux on RISC-V on FPGA (LOROF): RV64GC Sv39 Quad-Core Superscalar Out-of-Order Virtual Memory CPU☆18Jun 26, 2026Updated last week
- FPGA synthesis tool powered by equality saturation and program synthesis.☆14Jan 9, 2026Updated 5 months ago
- PyMTL3 wrapper of the Berkeley Hardfloat IP☆10Aug 9, 2023Updated 2 years ago
- Governance-related CHIPS Alliance documents, guides etc.☆10Feb 20, 2023Updated 3 years ago
- This github repository summarizes relevant papers for shift left techniques in electronic design automation (EDA).☆32Jun 17, 2026Updated 2 weeks ago
- ☆13Jun 21, 2026Updated last week
- 1-Click AI Models by DigitalOcean Gradient • AdDeploy popular AI models on DigitalOcean Gradient GPU virtual machines with just a single click. Zero configuration with optimized deployments.
- [IJCAI 2024] QiMeng-CPU-v1: Automated CPU Design by Learning from Input-Output Examples☆32May 4, 2025Updated last year
- ALSRAC: Approximate Logic Synthesis by Resubstitution with Approximate Care Set☆22Dec 23, 2024Updated last year
- A type-safe, formally verifiable HDL compiler in Lean 4. Inspired by Clash, built for high-assurance hardware synthesis.☆84Jun 27, 2026Updated last week
- enchmarking Large Language Models' Resistance to Malicious Code☆18Apr 23, 2026Updated 2 months ago
- ☆24Apr 9, 2025Updated last year
- Provides dot visualizations of chisel/firrtl circuites☆13Mar 12, 2019Updated 7 years ago
- A simple pdftotext conversion tool for Windows 8.1/10/11 and FEDORA/UBUNTU/DEBIAN/ARCH based linux distros using poppler-utils and Google…☆22Oct 27, 2024Updated last year