aichipdesign / chipgptft
Data is all you need: Finetuning LLMs for Chip Design via an Automated design-data augmentation framework (DAC 2024)
☆36Updated 2 months ago
Alternatives and similar repositories for chipgptft:
Users that are interested in chipgptft are comparing it to the libraries listed below
- Natural language is not enough: Benchmarking multi-modal generative AI for Verilog generation (ICCAD 2024)☆19Updated 7 months ago
- MasterRTL: A Pre-Synthesis PPA Estimation Framework for Any RTL Design☆42Updated 5 months ago
- ACM TODAES Best Paper Award, 2022☆24Updated last year
- An open-source benchmark for generating design RTL with natural language☆90Updated 3 months ago
- Dataset for ML-guided Accelerator Design☆35Updated 3 months ago
- DAC'22 paper: "Automated Accelerator Optimization Aided by Graph Neural Networks"☆40Updated last year
- An MLIR dialect to enable the efficient acceleration of ML model on CGRAs.☆58Updated 4 months ago
- ☆16Updated 3 years ago
- A systolic array simulator for multi-cycle MACs and varying-byte words, with the paper accepted to HPCA 2022.☆68Updated 3 years ago
- Template-based Reconfigurable Architecture Modeling Framework☆14Updated 2 years ago
- An infrastructure for integrated EDA☆38Updated last year
- ☆22Updated 3 months ago
- ☆49Updated 4 months ago
- A fast, accurate trace-based simulator for High-Level Synthesis.☆44Updated 3 weeks ago
- High-Performance Sparse Linear Algebra on HBM-Equipped FPGAs Using HLS☆85Updated 5 months ago
- ☆25Updated 10 months ago
- Gamora: Graph Learning based Symbolic Reasoning for Large-Scale Boolean Networks (DAC'23)☆49Updated last month
- An Open-Source Tool for CGRA Accelerators☆58Updated last month
- ☆39Updated 4 months ago
- Benchmarks for Approximate Circuit Synthesis☆15Updated 4 years ago
- ☆12Updated 6 months ago
- ☆41Updated 2 weeks ago
- An integrated CGRA design framework☆86Updated 3 months ago
- An LLVM pass that can generate CDFG and map the target loops onto a parameterizable CGRA.☆60Updated this week
- Hop-Wise Graph Attention for Scalable and Generalizable Learning on Circuits☆26Updated 6 months ago
- FlexASR: A Reconfigurable Hardware Accelerator for Attention-based Seq-to-Seq Networks☆42Updated this week
- CGRA framework with vectorization support.☆25Updated this week
- PANDA: Architecture-Level Power Evaluation by Unifying Analytical and Machine Learning Solutions☆14Updated last year
- A graph linear algebra overlay☆51Updated last year
- ☆27Updated 9 months ago