An example of analogue design using open source IC design tools
☆29Jul 22, 2021Updated 4 years ago
Alternatives and similar repositories for analogue_design_example
Users that are interested in analogue_design_example are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- ☆12Dec 22, 2020Updated 5 years ago
- components and examples for creating radio ICs using the open skywater 130nm PDK☆19Nov 29, 2020Updated 5 years ago
- A schematic editor for VLSI/Asic/Analog custom designs, netlist backends for VHDL, Spice and Verilog. The tool is focused on hierarchy an…☆451Updated this week
- An Amateur Radio Transceiver IC (2.4 / 5 / 10 GHz)☆73Oct 4, 2021Updated 4 years ago
- Waveform Generator☆11Jul 18, 2022Updated 3 years ago
- Analog and power building blocks for sky130 pdk☆22Mar 3, 2021Updated 5 years ago
- Verilog VPI module to dump FST (Fast Signal Trace) databases☆20Sep 19, 2023Updated 2 years ago
- Coriolis VLSI EDA Tool (LIP6)☆83Jan 25, 2026Updated last month
- A configurable SRAM generator☆58Mar 4, 2026Updated 2 weeks ago
- KLayout technology files for ASAP7 FinFET educational process☆25Feb 5, 2023Updated 3 years ago
- ☆20Nov 22, 2021Updated 4 years ago
- ☆30Feb 4, 2021Updated 5 years ago
- Fundamental analog circuit designs to kick start and embark the journey in the world of IC design.☆33Aug 31, 2023Updated 2 years ago
- Tapeouts done using OpenFASOC☆17Nov 3, 2025Updated 4 months ago
- Solve one design problem each day for a month☆49Feb 3, 2023Updated 3 years ago
- Nix derivations for EDA tools☆12Nov 19, 2025Updated 4 months ago
- Design of LDO using open source SKY130PDK☆15Aug 24, 2024Updated last year
- BAG2 workspace for fake PDK (cds_ff_mpt)☆60May 20, 2020Updated 5 years ago
- A 10bit SAR ADC in Sky130☆33Dec 4, 2022Updated 3 years ago
- Cadence Virtuoso Design Management System☆36Nov 13, 2022Updated 3 years ago
- Carrier for efabless Caravel chip used for Google/Skywater 130nm shuttle program.☆18Sep 24, 2021Updated 4 years ago
- 130nm BiCMOS Open Source PDK, dedicated for Analog, Mixed Signal and RF Design. Documentation is here:☆694Updated this week
- A magnet u-joint arms and effector for the Rostock delta 3d printer.☆20May 31, 2013Updated 12 years ago
- Open design rule (1um)☆22Oct 18, 2022Updated 3 years ago
- Fully Open Source FASOC generators built on top of open-source EDA tools☆323Oct 22, 2025Updated 5 months ago
- Dual-issue RV64IM processor for fun & learning☆64Jul 4, 2023Updated 2 years ago
- Advanced Integrated Circuits 2024☆24Nov 16, 2024Updated last year
- This repository is for (pre-)release versions of the Revolution EDA.☆60Updated this week
- Connect Cadence Virtuoso to a Python client using sockets.☆18Aug 27, 2020Updated 5 years ago
- KLayout technology files for Skywater SKY130☆44Jul 19, 2023Updated 2 years ago
- ☆164Dec 4, 2022Updated 3 years ago
- Wi-Fi enabled XVC programmer/debugger based on ESP8266☆12May 31, 2015Updated 10 years ago
- LibreSilicon's Standard Cell Library Generator☆22Oct 30, 2025Updated 4 months ago
- Yosys plugin for logic locking and supply-chain security☆23Apr 5, 2025Updated 11 months ago
- PLL Designs on Skywater 130nm MPW☆24Dec 3, 2023Updated 2 years ago
- Create fast and efficient standard cell based adders, multipliers and multiply-adders.☆120Sep 20, 2023Updated 2 years ago
- Generate testbench for your verilog module.☆12Sep 12, 2018Updated 7 years ago
- This project shows the design of a frequency synthesizer PLL system that produces a 1.92 GHz signal with a reference input of 30 MHz, wit…☆82Jun 12, 2023Updated 2 years ago
- This library is an attempt to make transistor sizing for Analog design less painful.☆23Mar 15, 2026Updated last week