An example of analogue design using open source IC design tools
☆29Jul 22, 2021Updated 5 years ago
Alternatives and similar repositories for analogue_design_example
Users that are interested in analogue_design_example are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- ☆12Dec 22, 2020Updated 5 years ago
- components and examples for creating radio ICs using the open skywater 130nm PDK☆19Nov 29, 2020Updated 5 years ago
- XSCHEM symbol libraries for the Google-Skywater 130nm process design kit.☆74May 13, 2026Updated 2 months ago
- A schematic editor for VLSI/Asic/Analog custom designs, netlist backends for VHDL, Spice and Verilog. The tool is focused on hierarchy an…☆482Jul 15, 2026Updated last week
- An Amateur Radio Transceiver IC (2.4 / 5 / 10 GHz)☆74Oct 4, 2021Updated 4 years ago
- Virtual machines for every use case on DigitalOcean • AdGet dependable uptime with 99.99% SLA, simple security tools, and predictable monthly pricing with DigitalOcean's virtual machines, called Droplets.
- Analog and power building blocks for sky130 pdk☆22Mar 3, 2021Updated 5 years ago
- KLayout technology files for ASAP7 FinFET educational process☆25Feb 5, 2023Updated 3 years ago
- Coriolis VLSI EDA Tool (LIP6)☆89Updated this week
- ☆21Nov 22, 2021Updated 4 years ago
- ☆30Feb 4, 2021Updated 5 years ago
- Solve one design problem each day for a month☆55Feb 3, 2023Updated 3 years ago
- 12 bit SAR ADC IP in Skywater 130 nm PDK☆31May 30, 2024Updated 2 years ago
- Nix derivations for EDA tools☆12Nov 19, 2025Updated 8 months ago
- BAG2 workspace for fake PDK (cds_ff_mpt)☆61May 20, 2020Updated 6 years ago
- Deploy to Railway using AI coding agents - Free Credits Offer • AdUse Claude Code, Codex, OpenCode, and more. Autonomous software development now has the infrastructure to match with Railway.
- A configurable SRAM generator☆66Jun 28, 2026Updated 3 weeks ago
- Design of LDO using open source SKY130PDK☆17Aug 24, 2024Updated last year
- Carrier for efabless Caravel chip used for Google/Skywater 130nm shuttle program.☆18Sep 24, 2021Updated 4 years ago
- Open design rule (1um)☆23Oct 18, 2022Updated 3 years ago
- Cadence Virtuoso Design Management System☆39Nov 13, 2022Updated 3 years ago
- Verilog VPI module to dump FST (Fast Signal Trace) databases☆23Sep 19, 2023Updated 2 years ago
- Fully Open Source FASOC generators built on top of open-source EDA tools☆342Oct 22, 2025Updated 9 months ago
- Advanced Integrated Circuits 2024☆24Nov 16, 2024Updated last year
- Dual-issue RV64IM processor for fun & learning☆64Jul 4, 2023Updated 3 years ago
- Managed Kubernetes at scale on DigitalOcean • AdDigitalOcean Kubernetes includes the control plane, bandwidth allowance, container registry, automatic updates, and more for free.
- PLL Designs on Skywater 130nm MPW☆25Dec 3, 2023Updated 2 years ago
- EUTelescope -- A Generic Pixel Telescope Data Analysis Framework☆14May 4, 2020Updated 6 years ago
- Tapeouts done using OpenFASOC☆19Nov 3, 2025Updated 8 months ago
- ☆171Dec 4, 2022Updated 3 years ago
- LibreSilicon's Standard Cell Library Generator☆22Jun 7, 2026Updated last month
- Fundamental analog circuit designs to kick start and embark the journey in the world of IC design.☆35Aug 31, 2023Updated 2 years ago
- Yosys plugin for logic locking and supply-chain security☆24Apr 5, 2025Updated last year
- KLayout technology files for Skywater SKY130☆44Jul 19, 2023Updated 3 years ago
- Connect Cadence Virtuoso to a Python client using sockets.☆18Aug 27, 2020Updated 5 years ago
- End-to-end encrypted email - Proton Mail • AdSpecial offer: 40% Off Yearly / 80% Off First Month. All Proton services are open source and independently audited for security.
- MOSIS MPW Test Data and SPICE Models Collections☆42Apr 2, 2020Updated 6 years ago
- Create fast and efficient standard cell based adders, multipliers and multiply-adders.☆124Sep 20, 2023Updated 2 years ago
- Wi-Fi enabled XVC programmer/debugger based on ESP8266☆12May 31, 2015Updated 11 years ago
- Logarithmic DAC for AY8913 and SN76489 programmable sound generators (Done as part of Zero To ASIC Analog course)☆11Jun 1, 2024Updated 2 years ago
- This library is an attempt to make transistor sizing for Analog design less painful.☆26Jul 11, 2026Updated last week
- A 10bit SAR ADC in Sky130☆40Dec 4, 2022Updated 3 years ago
- ☆19Dec 15, 2023Updated 2 years ago