jonpry / PillLinks
Skill language interpreter
☆65Updated 4 years ago
Alternatives and similar repositories for Pill
Users that are interested in Pill are comparing it to the libraries listed below
Sorting:
- BAG framework☆40Updated 10 months ago
- Skywater 130nm Klayout Device Generators PDK☆31Updated 10 months ago
- Parametric layout generator for digital, analog and mixed-signal integrated circuits☆54Updated this week
- Verilog-A simulation models☆72Updated last week
- ☆18Updated last year
- MOSIS MPW Test Data and SPICE Models Collections☆36Updated 5 years ago
- Netgen complete LVS tool for comparing SPICE or verilog netlists☆117Updated 3 weeks ago
- A tiny Python package to parse spice raw data files.☆53Updated 2 years ago
- Circuit Automatic Characterization Engine☆49Updated 4 months ago
- Python port of Prof. Boris Murmann's gm/ID Starter Kit☆54Updated 7 years ago
- KLayout technology files for Skywater SKY130☆39Updated last year
- ☆46Updated 4 months ago
- Qrouter detail router for digital ASIC designs☆57Updated last month
- ☆40Updated 3 months ago
- Cadence SKILL utilities that have boosted my productivity considerably for 10+ years.☆45Updated this week
- repository for a bandgap voltage reference in SKY130 technology☆38Updated 2 years ago
- This repository is for (pre-)release versions of the Revolution EDA.☆42Updated last week
- ☆22Updated 4 years ago
- Hardware Description Library☆80Updated last month
- Read Spectre PSF files☆64Updated last week
- Jupyter kernel for Cadence SKILL☆22Updated 8 years ago
- A simple MOSFET model with only 5-DC-parameters for circuit simulation☆41Updated 11 months ago
- ☆54Updated last year
- This is the XDM netlist converter, used to convert PSPICE and HSPICE netists into Xyce format.☆19Updated last year
- Interchange formats for chip design.☆31Updated 3 weeks ago
- BAG2 workspace for fake PDK (cds_ff_mpt)☆55Updated 5 years ago
- An innovative Verilog-A compiler☆152Updated 9 months ago
- Cadence Virtuoso Design Management System☆34Updated 2 years ago
- XSCHEM symbol libraries for the Google-Skywater 130nm process design kit.☆63Updated 2 weeks ago
- Open-source version of SLiCAP, implemented in python☆36Updated 6 months ago