Run rocket-chip on FPGA
☆76Nov 16, 2025Updated 6 months ago
Alternatives and similar repositories for starship
Users that are interested in starship are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- The next generation integrated development environment for processor design and verification. It has multi-hardware language support, op…☆112Sep 17, 2022Updated 3 years ago
- Artifact evaluation of paper: MorFuzz: Fuzzing Processor via Runtime Instruction Morphing enhanced Synchronizable Co-simulation☆51Apr 22, 2025Updated last year
- Run Linux on RISC-V Spike Simulator☆67Nov 21, 2025Updated 6 months ago
- Wrapper for Rocket-Chip on FPGAs☆138Oct 5, 2022Updated 3 years ago
- ☆11Apr 7, 2022Updated 4 years ago
- GPUs on demand by Runpod - Special Offer Available • AdRun AI, ML, and HPC workloads on powerful cloud GPUs—without limits or wasted spend. Deploy GPUs in under a minute and pay by the second.
- chipyard in mill :P☆77Nov 20, 2023Updated 2 years ago
- Wrapper for ETH Ariane Core☆22Sep 2, 2025Updated 8 months ago
- Fuzzing General-Purpose Hardware Designs with Software Fuzzers☆27Mar 8, 2026Updated 2 months ago
- ☆22Oct 24, 2020Updated 5 years ago
- ☆16May 2, 2026Updated 3 weeks ago
- small and independent checkpoint☆12Nov 4, 2023Updated 2 years ago
- The 'missing header' for Chisel☆23Feb 5, 2026Updated 3 months ago
- A Modular Open-Source Hardware Fuzzing Framework☆37Dec 14, 2021Updated 4 years ago
- The Common Evaluation Platform (CEP), based on UCB's Chipyard Framework, is an SoC design that contains only license-unencumbered, freely…☆26Sep 26, 2024Updated last year
- Managed Kubernetes at scale on DigitalOcean • AdDigitalOcean Kubernetes includes the control plane, bandwidth allowance, container registry, automatic updates, and more for free.
- Code repository for Coppelia tool☆24Nov 12, 2020Updated 5 years ago
- Xilinx Vivado block designs for FPGA RISC-V SoC running Debian Linux distro☆1,075Apr 24, 2026Updated last month
- This repository contains the hardware, software, and OS support for the Programmable Hardware Monitor (PHMon).☆28Aug 10, 2020Updated 5 years ago
- Vivado in GitLab-Runner for GitLab CI/CD☆10Oct 27, 2022Updated 3 years ago
- Python (OpenCV, NumPy) application for image noise removal by aligning and averaging many images.☆18Aug 15, 2018Updated 7 years ago
- Modern co-simulation framework for RISC-V CPUs☆175Updated this week
- Hack@DAC 2021☆19Jul 24, 2024Updated last year
- This repository contains the verification suite for verifying Berkeley Out-of-Order Machine (BOOM) against transient execution attacks ba…☆24Mar 2, 2023Updated 3 years ago
- Nix template for the chisel-based industrial designing flows.☆57Apr 23, 2025Updated last year
- Virtual machines for every use case on DigitalOcean • AdGet dependable uptime with 99.99% SLA, simple security tools, and predictable monthly pricing with DigitalOcean's virtual machines, called Droplets.
- An Agile RISC-V SoC Design Framework with in-order cores, out-of-order cores, accelerators, and more☆2,270May 19, 2026Updated last week
- ☆35Mar 20, 2025Updated last year
- Proof of concepts for speculative attacks using the BOOM core (https://github.com/riscv-boom/riscv-boom)☆69Oct 18, 2019Updated 6 years ago
- A collection of tests and benchmarks for the Arc simulation backend of CIRCT☆38Jan 26, 2026Updated 4 months ago
- SurgeFuzz: Surge-Aware Directed Fuzzing for CPU Designs (ICCAD 2023)☆23Dec 5, 2024Updated last year
- A simple OoO processor developed by njuallen and wierton, it won 2nd prize in LoongsonCup18.☆31Feb 10, 2020Updated 6 years ago
- Lightweight re-packaging of AsyncQueue library from rocket-chip☆19Jun 23, 2023Updated 2 years ago
- Running ahead of memory latency - Part II project☆10Jan 7, 2023Updated 3 years ago
- ☆71Feb 2, 2026Updated 3 months ago
- Deploy to Railway using AI coding agents - Free Credits Offer • AdUse Claude Code, Codex, OpenCode, and more. Autonomous software development now has the infrastructure to match with Railway.
- The working draft to split rocket core out from rocket chip☆14Dec 22, 2023Updated 2 years ago
- Testing processors with Random Instruction Generation☆58Jan 13, 2026Updated 4 months ago
- Test suite containing a reproduction of all major transient-execution attacks in RISC-V and CHERI-RISC-V assembly☆17Jun 7, 2021Updated 4 years ago
- Open source high performance IEEE-754 floating unit☆95Feb 26, 2024Updated 2 years ago
- chisel tutorial exercises and answers☆752Jan 6, 2022Updated 4 years ago
- A template project for beginning new Chisel work☆700Feb 24, 2026Updated 3 months ago
- Run Rocket Chip on VCU128☆30Oct 21, 2025Updated 7 months ago