shioya-lab-public / surgefuzz
SurgeFuzz: Surge-Aware Directed Fuzzing for CPU Designs (ICCAD 2023)
☆19Updated 2 months ago
Alternatives and similar repositories for surgefuzz:
Users that are interested in surgefuzz are comparing it to the libraries listed below
- Project Repo for the Simulator Independent Coverage Research☆18Updated last year
- Fuzzing for SpinalHDL☆16Updated 2 years ago
- ☆15Updated 3 years ago
- A Modular Open-Source Hardware Fuzzing Framework☆32Updated 3 years ago
- Code repository for Coppelia tool☆22Updated 4 years ago
- The SoC used for the beta phase of Hack@DAC 2018.☆17Updated 4 years ago
- All the tools you need to reproduce the CellIFT paper experiments☆18Updated last week
- Artifact evaluation of paper: MorFuzz: Fuzzing Processor via Runtime Instruction Morphing enhanced Synchronizable Co-simulation☆25Updated last year
- Test suite containing a reproduction of all major transient-execution attacks in RISC-V and CHERI-RISC-V assembly☆11Updated 3 years ago
- Fuzzing General-Purpose Hardware Designs with Software Fuzzers☆14Updated last month
- rfuzz: coverage-directed fuzzing for RTL research platform☆102Updated 2 years ago
- ☆22Updated last year
- A concolic testing engine for RISC-V embedded software with support for SystemC peripherals☆21Updated last year
- Testing processors with Random Instruction Generation☆32Updated 2 weeks ago
- A tutorial for setting up Symbolic Quick Error Detection (SQED) using the model checker, CoSA, on the Ride Core☆12Updated 5 years ago
- BTOR2 MLIR project☆23Updated last year
- Proof-of-concept implementation for the paper "A Security RISC: Microarchitectural Attacks on Hardware RISC-V CPUs" (IEEE S&P 2023)☆58Updated 6 months ago
- PyCaliper is Python-based tooling infrastructure that allows the verification and synthesis of specifications (properties) for RTL (e.g.,…☆18Updated last month
- This repository contains the verification suite for verifying Berkeley Out-of-Order Machine (BOOM) against transient execution attacks ba…☆17Updated last year
- This repository contains the hardware, software, and OS support for the Programmable Hardware Monitor (PHMon).☆26Updated 4 years ago
- A port of the RIPE suite to RISC-V.☆29Updated 6 years ago
- ☆17Updated 8 months ago
- ☆81Updated 2 years ago
- ☆80Updated 8 months ago
- Memory Tagging ISA extension that can be used by software to enforce memory tag checks on memory loads and stores☆11Updated last week
- GPU-enabled Hardware Fuzzer using Genetic Algorithm☆17Updated last year
- ☆12Updated 3 years ago
- ☆17Updated 7 months ago
- Data oblivious ISA prototyped on the RISC-V BOOM processor.☆20Updated 2 years ago