Alternatives and similar repositories for surgefuzz:

Users that are interested in surgefuzz are comparing it to the libraries listed below

• ekiwi / simulator-independent-coverage
  Project Repo for the Simulator Independent Coverage Research
  ☆18Updated 2 years ago
• skmuduli92 / HyperFuzzer
  ☆15Updated 3 years ago
• ics-jku / spinalfuzz
  Fuzzing for SpinalHDL
  ☆16Updated 2 years ago
• CTSRD-CHERI / Test-Suite-Transient-Execution
  Test suite containing a reproduction of all major transient-execution attacks in RISC-V and CHERI-RISC-V assembly
  ☆14Updated 3 years ago
• comsec-group / cellift-meta
  All the tools you need to reproduce the CellIFT paper experiments
  ☆18Updated last month
• ekiwi / rtl-fuzz-lab
  A Modular Open-Source Hardware Fuzzing Framework
  ☆32Updated 3 years ago
• compsec-snu / specdoctor
  ☆23Updated 2 years ago
• hackdac / hackdac_2018_beta
  The SoC used for the beta phase of Hack@DAC 2018.
  ☆17Updated 4 years ago
• bu-icsg / PHMon
  This repository contains the hardware, software, and OS support for the Programmable Hardware Monitor (PHMon).
  ☆26Updated 4 years ago
• rzhang2285 / Coppelia
  Code repository for Coppelia tool
  ☆22Updated 4 years ago
• sycuricon / MorFuzz
  Artifact evaluation of paper: MorFuzz: Fuzzing Processor via Runtime Instruction Morphing enhanced Synchronizable Co-simulation
  ☆25Updated last year
• agra-uni-bremen / symex-vp
  A concolic testing engine for RISC-V embedded software with support for SystemC peripherals
  ☆22Updated last year
• ekiwi / rfuzz
  rfuzz: coverage-directed fuzzing for RTL research platform
  ☆103Updated 2 years ago
• cispa / Security-RISC
  Proof-of-concept implementation for the paper "A Security RISC: Microarchitectural Attacks on Hardware RISC-V CPUs" (IEEE S&P 2023)
  ☆60Updated 7 months ago
• draperlaboratory / hope-RIPE
  A port of the RIPE suite to RISC-V.
  ☆29Updated 6 years ago
• makaimann / ride-core-demo
  A tutorial for setting up Symbolic Quick Error Detection (SQED) using the model checker, CoSA, on the Ride Core
  ☆12Updated 5 years ago
• compsec-snu / difuzz-rtl
  ☆80Updated 9 months ago
• RPTU-EIS / upec-boom-verification-suite
  This repository contains the verification suite for verifying Berkeley Out-of-Order Machine (BOOM) against transient execution attacks ba…
  ☆17Updated 2 years ago
• agurfinkel / btor2mlir
  BTOR2 MLIR project
  ☆25Updated last year
• googleinterns / hw-fuzzing
  ☆80Updated 2 years ago
• cispa / hammulator
  Proof-of-concept implementation for the paper "Hammulator: Simulate Now - Exploit Later" (DRAMSec 2023)
  ☆14Updated last year
• comsec-group / cascade-artifacts
  Artifacts for Cascade: CPU Fuzzing via Intricate Program Generation (USENIX Security 2024)
  ☆123Updated 6 months ago
• efeslab / hardware-bugbase
  ☆17Updated 9 months ago
• CTSRD-CHERI / TestRIG
  Testing processors with Random Instruction Generation
  ☆35Updated this week
• pfnet-research / ATPG4SV
  A prototype of Concolic Testing engine for SystemVerilog, developed as part of PFN summer internship 2018.
  ☆17Updated 6 years ago
• efeslab / asplos22-hardware-debugging-artifact
  ☆11Updated 9 months ago
• morenes / AutoCC
  Methodology that leverages FPV to automatically discover covert channels in hardware that is time-shared between processes. AutoCC operat…
  ☆17Updated 4 months ago
• alastairreid / asl-interpreter
  Example implementation of Arm's Architecture Specification Language (ASL)
  ☆41Updated last week
• riscv / riscv-memory-tagging
  Memory Tagging ISA extension that can be used by software to enforce memory tag checks on memory loads and stores
  ☆12Updated this week