Alternatives and similar repositories for gitlab-runner-vivado

Users that are interested in gitlab-runner-vivado are comparing it to the libraries listed below

• Seeker0472 / ysyx-linux
  给NEMU移植Linux Kernel!
  ☆18Updated this week
• Tang-Haojin / YuQuan
  A RISC-V core running Debian (and a LoongArch core running Linux).
  ☆22Updated last year
• arch-simulator-sig / chisel-env
  Basic chisel difftest environment for RTL design (WIP
  ☆18Updated 2 months ago
• chipsalliance / rvdecoderdb
  The Scala parser to parse riscv/riscv-opcodes generate
  ☆21Updated this week
• jaypiper / simulator
  ☆29Updated this week
• NoAXI / NoAXI-LoongArch-CPU
  Second Prize in NSCSCC 2024. Developed by team NoAXI from Hangzhou Dianzi University.
  ☆17Updated 8 months ago
• CmdBlockZQG / rvcore-mini-linux
  Build mini linux for your own RISC-V emulator!
  ☆21Updated 8 months ago
• ftppz / ShanghaiTech-YSYX
  Unofficial guide for ysyx students applying to ShanghaiTech University
  ☆21Updated 3 months ago
• OpenXiangShan / XiangShan-Design-Doc
  Documentation for XiangShan Design
  ☆26Updated this week
• lizhirui / DreamCoreV2
  ☆22Updated 2 years ago
• FurryAcetylCoA / gtkwave-filter-process-RISC
  A tool to decode RISC-V and LoongArch and MIPS instructions in gtkwave
  ☆31Updated last month
• 1932287243 / NPC_IDE
  This is an IDE for YSYX_NPC debuging
  ☆12Updated 5 months ago
• OpenXiangShan / Deterload
  Xiangshan deterministic workloads generator
  ☆19Updated 2 weeks ago
• puckbee / moli
  ☆11Updated this week
• tastynoob / aura-core
  "aura" my super-scalar O3 cpu core
  ☆24Updated last year
• OSCPU / openperf
  ☆11Updated 3 months ago
• isnthzy / lightsss-chiplab
  本项目已被合并至官方Chiplab中
  ☆12Updated 4 months ago
• Jpz-sdju / trinity
  ☆21Updated 2 months ago
• ConvolutedDog / gpgpu-sim-comments
  GPGPU-Sim 中文注释版代码，包含 GPGPU-Sim 模拟器的最新版代码，经过中文注释，以帮助中文用户更好地理解和使用该模拟器。
  ☆16Updated 5 months ago
• Tanggling / BOOMCore
  This is a project created and completed by team BOOM(Beihang OO masters).This is a superscalar processor with a 13-stage out-of-order dua…
  ☆16Updated 8 months ago
• Clo91eaf / PUA-MIPS
  NSCSCC 2023 The Second Prize. TEAM PUA FROM HDU.
  ☆13Updated 2 months ago
• isnthzy / nscscc2024-liangyi
  nscscc2024，HPU河南理工大学参赛作品，两仪处理器
  ☆10Updated 9 months ago
• cyyself / soc-simulator
  A Verilator based SoC simulator that allows you to define AXI Slave interface in software.
  ☆49Updated 6 months ago
• sequencer / arithmetic
  ☆33Updated 2 months ago
• RISMicroDevices / CHIron
  Open-source AMBA CHI infrastructures (supporting Issue B, E.b)
  ☆19Updated last week
• wshenyi / EECS-470-FinalProject
  A 2-Way Super-Scalar OoO RISC-V Core Based on Intel P6 Microarchitecture.
  ☆14Updated 2 years ago
• YSYX-OpenDoc / riscv-isa-manual
  ☆18Updated last week
• chipsalliance / chisel-interface
  The 'missing header' for Chisel
  ☆20Updated 2 months ago
• RISMicroDevices / RMM4NC30F2X
  Gemini 30F2 (30F3 variant 00) MIPS Processor for NSCSCC2022
  ☆11Updated 2 years ago
• secure-v / vsh
  VSH（SHell for Visualizing vcd file）项目为数字波形文件命令行查看器。
  ☆19Updated last month