Workspace Integration Tool
☆23Nov 6, 2020Updated 5 years ago
Alternatives and similar repositories for wit
Users that are interested in wit are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- Wake build descriptions of hardware generators☆12Dec 11, 2020Updated 5 years ago
- The SiFive wake build tool☆94Updated this week
- An example of on-boarding a PIO block in with duh and wake☆12Nov 18, 2020Updated 5 years ago
- 👾 Design ∪ Hardware☆79Jul 1, 2026Updated last month
- C/Assembly macros for talking with Rocket Custom Coprocessors (RoCCs)☆53Jul 14, 2020Updated 6 years ago
- GPUs on demand by Runpod - Special Offer Available • AdRun AI, ML, and HPC workloads on powerful cloud GPUs—without limits or wasted spend. Deploy GPUs in under a minute and pay by the second.
- LLVM based HLS library for HWToolkit (hardware devel. toolkit)☆29Updated this week
- e300 and u500 devkits☆10Nov 15, 2020Updated 5 years ago
- RISC-V CPU in SystemVerilog & Custom Migen-based SoC Generator☆11Dec 29, 2021Updated 4 years ago
- ☆12Feb 16, 2019Updated 7 years ago
- A Simple to use build environment for parallella using yocto☆13Jul 28, 2025Updated last year
- Provides a packaged collection of open source EDA tools☆12Apr 14, 2019Updated 7 years ago
- Python bindings for coreir☆11Sep 13, 2023Updated 2 years ago
- Converting systemverilog to verilog.☆10Feb 15, 2018Updated 8 years ago
- A collection of tools for working with Chisel-generated hardware in SystemC☆16Jul 23, 2019Updated 7 years ago
- Managed hosting for WordPress and PHP on Cloudways • AdManaged hosting for WordPress, Magento, Laravel, or PHP apps, on multiple cloud providers. Deploy in minutes on Cloudways by DigitalOcean.
- Provides dot visualizations of chisel/firrtl circuites☆13Mar 12, 2019Updated 7 years ago
- A Zero Cost Abstruction of FSM(Finite State Machine) circuits based on chisel3.☆13Oct 8, 2021Updated 4 years ago
- Wrapper for ETH Ariane Core☆21Sep 2, 2025Updated 11 months ago
- Verilog for Julia☆52Apr 18, 2017Updated 9 years ago
- Common RTL blocks used in SiFive's projects☆194May 13, 2022Updated 4 years ago
- OpenPOWER Foundation General Information & Repository Listing☆29Mar 28, 2022Updated 4 years ago
- CoreMark® is an industry-standard benchmark that measures the performance of central processing units (CPU) and embedded microcrontroller…☆11Jul 21, 2020Updated 6 years ago
- Docker Development Environment for SpinalHDL☆20Aug 8, 2024Updated 2 years ago
- P4FPGA is located at github.com/hanw/p4fpga☆13Jan 27, 2017Updated 9 years ago
- GPUs on demand by Runpod - Special Offer Available • AdRun AI, ML, and HPC workloads on powerful cloud GPUs—without limits or wasted spend. Deploy GPUs in under a minute and pay by the second.
- RISC-V Soft CPU Security Contest by Thales and Microchip Technology☆12Jul 29, 2019Updated 7 years ago
- mantle library☆44Dec 20, 2022Updated 3 years ago
- This project has files needed to design and characterise flipflop☆21Jun 3, 2019Updated 7 years ago
- ☆11Nov 13, 2020Updated 5 years ago
- A simple utility for doing RISC-V HPM perf monitoring.☆18May 8, 2017Updated 9 years ago
- Import and export IP-XACT XML register models☆39Nov 5, 2025Updated 9 months ago
- OpenSoC Fabric - A Network-On-Chip Generator☆18Jun 12, 2017Updated 9 years ago
- RISC-V Rocket Chip Strap-on-Booster with Fused Universal Neural Network (FuNN) eNNgine☆21Mar 17, 2022Updated 4 years ago
- Translates IPXACT XML to synthesizable VHDL or SystemVerilog☆64Jan 28, 2026Updated 7 months ago
- Managed hosting for WordPress and PHP on Cloudways • AdManaged hosting for WordPress, Magento, Laravel, or PHP apps, on multiple cloud providers. Deploy in minutes on Cloudways by DigitalOcean.
- ☆31Aug 19, 2019Updated 7 years ago
- Python library of AST nodes for SystemVerilog/VHDL, code generator, transpiler and translator☆41Updated this week
- Craft 2 top-level repository☆14May 15, 2019Updated 7 years ago
- Is a collection of NULL Convention Logic (NCL) circuits and libraries written in Verilog to provide the experience of logically determine…☆15Jun 15, 2016Updated 10 years ago
- Wrappers for open source FPU hardware implementations.☆37Nov 27, 2025Updated 9 months ago
- A barebones 64-bit RISC-V micro-controller class CPU, implementing the I(nteger), M(ul/div), C(ompressed) and K(ryptography) extensions.☆52Jan 31, 2022Updated 4 years ago
- - Designed a Nand Flash Controller, Flash Memory and Buffer (Design Target : Samsung K9F1G08R0A NAND Flash). - Implemented operations : …☆21Apr 15, 2018Updated 8 years ago