Selected problems and their solutions from the book on "Machine Intelligence in Design Automation"
☆27Dec 9, 2018Updated 7 years ago
Alternatives and similar repositories for mida
Users that are interested in mida are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- A simple tool to demonstrate the physical design steps of VLSI Design Flow.☆11Dec 13, 2020Updated 5 years ago
- SMT-based Simultaneous Place-&-Route for Standard Cell Synthesis for PROBE 2.0☆20Jul 22, 2020Updated 6 years ago
- ILP SAT Detailed Router☆13Apr 14, 2020Updated 6 years ago
- Incremental Timing-Driven Placement, problem C of ICCAD contest 2015☆16Sep 28, 2017Updated 8 years ago
- ☆39Apr 10, 2023Updated 3 years ago
- Virtual machines for every use case on DigitalOcean • AdGet dependable uptime with 99.99% SLA, simple security tools, and predictable monthly pricing with DigitalOcean's virtual machines, called Droplets.
- The ANUBIS benchmark suite for Incremental Synthesis☆12Dec 15, 2020Updated 5 years ago
- Courseworks of CS6165 VLSI Physical Design Automation, NTHU.☆50Jan 23, 2021Updated 5 years ago
- SMT-based-STDCELL-Layout-Generator☆20Sep 30, 2021Updated 4 years ago
- ☆11Mar 23, 2022Updated 4 years ago
- EDA physical synthesis optimization kit☆69Nov 13, 2023Updated 2 years ago
- ☆10Aug 22, 2023Updated 3 years ago
- Robot Framework KiCad Library☆10Oct 20, 2022Updated 3 years ago
- Provides a packaged collection of open source EDA tools☆12Apr 14, 2019Updated 7 years ago
- Analyzer and simulator of logic circuit☆15May 8, 2017Updated 9 years ago
- Deploy open-source AI quickly and easily - Special Bonus Offer • AdRunpod Hub is built for open source. One-click deployment and autoscaling endpoints without provisioning your own infrastructure.
- ☆16Apr 30, 2021Updated 5 years ago
- Coriolis VLSI EDA Tool (LIP6)☆93Aug 28, 2026Updated 3 weeks ago
- Senior Design☆12Jan 26, 2025Updated last year
- Benchmark Generator for Global Routing☆13Jul 18, 2019Updated 7 years ago
- genetic algorithm usage for routing optimization ( pyqt )☆15Mar 24, 2019Updated 7 years ago
- ☆60Apr 8, 2024Updated 2 years ago
- Spiking Neural Network Accelerator☆15May 18, 2022Updated 4 years ago
- Simplify VLSI (timing, power, noise, correlation, reliability) modeling and analysis with Characterization Description Format☆13Feb 13, 2020Updated 6 years ago
- GuidedSampler: Coverage-guided Sampling of SMT Solutions☆15Jul 9, 2025Updated last year
- Managed hosting for WordPress and PHP on Cloudways • AdManaged hosting for WordPress, Magento, Laravel, or PHP apps, on multiple cloud providers. Deploy in minutes on Cloudways by DigitalOcean.
- 32-bit RISC-V microcontroller☆12Sep 11, 2021Updated 5 years ago
- The approach involves the usage of Multi-Criteria Decision Analyses, including Weighted Sum Model (WSM), Weighted Product Model (WPM) and…☆11Oct 22, 2021Updated 4 years ago
- EDA Analytics Central☆16Dec 8, 2022Updated 3 years ago
- ☆13Nov 3, 2023Updated 2 years ago
- Creating Logic Functions [AND, OR, NOT, XNOR, XOR, NAND, etc] using Neural Network☆18Oct 28, 2019Updated 6 years ago
- Brilliantly Radical Artificially Intelligent Neural Machine☆18Dec 28, 2017Updated 8 years ago
- Libre Silicon Compiler☆22Apr 13, 2021Updated 5 years ago
- The open- MSP430 is an open-source 16-bit microcontroller core written in Verilog, that is compatible with the Texas Instruments MSP430 m…☆19Jan 28, 2022Updated 4 years ago
- An Extensible Framework for Hardware Verification and Debugging☆17Sep 14, 2022Updated 4 years ago
- Bare Metal GPUs on DigitalOcean Gradient AI • AdPurpose-built for serious AI teams training foundational models, running large-scale inference, and pushing the boundaries of what's possible.
- Very simple Cortex-M1 SoC design based on ARM DesignStart☆19Jan 25, 2022Updated 4 years ago
- A High-performance Timing Analysis Tool for VLSI Systems☆716Dec 26, 2025Updated 8 months ago
- This project is the 'Python' version of Classic Quantum Evolutionary Algorithm (QEA) which finds a solution for "Knapsack" problem.☆11Jun 17, 2019Updated 7 years ago
- Optimized Circuit Generation for Secure Multiparty Computation☆12Nov 25, 2019Updated 6 years ago
- stoplists for African languages generated from the ASP corpus☆14Jan 16, 2016Updated 10 years ago
- Python-based Verilog Parser (currently Netlist only)☆54Apr 12, 2017Updated 9 years ago
- This project has files needed to design and characterise flipflop☆21Jun 3, 2019Updated 7 years ago