riscv / riscv-plic-spec
PLIC Specification
☆139Updated last year
Alternatives and similar repositories for riscv-plic-spec:
Users that are interested in riscv-plic-spec are comparing it to the libraries listed below
- Proposal for a RISC-V Core-Local Interrupt Controller (CLIC)☆259Updated this week
- ☆86Updated this week
- RISC-V IOMMU Specification☆103Updated last week
- ☆85Updated 2 years ago
- RISC-V Torture Test☆182Updated 7 months ago
- ☆71Updated 4 months ago
- RISC-V architecture concurrency model litmus tests☆74Updated last year
- RISC-V Processor Trace Specification☆171Updated this week
- RISC-V Debug Support for our PULP RISC-V Cores☆245Updated 3 months ago
- ☆168Updated last year
- Setup scripts and files needed to compile CoreMark on RISC-V☆64Updated 7 months ago
- Instruction Set Generator initially contributed by Futurewei☆272Updated last year
- Documentation for the OpenHW Group's set of CORE-V RISC-V cores☆206Updated this week
- RISC-V Architecture Profiles☆133Updated 3 weeks ago
- 4 stage, in-order, compute RISC-V core based on the CV32E40P☆225Updated 3 months ago
- Documenting the expected behaviour and supported command-line switches for GNU and LLVM based RISC-V toolchains☆149Updated this week
- ☆151Updated last year
- ☆275Updated this week
- ☆42Updated 3 years ago
- Simple machine mode program to probe RISC-V control and status registers☆118Updated last year
- Working draft of the proposed RISC-V Bitmanipulation extension☆209Updated 11 months ago
- AIA IP compliant with the RISC-V AIA spec☆35Updated last month
- RISC-V Profiles and Platform Specification☆113Updated last year
- 4 stage, in-order, secure RISC-V core based on the CV32E40P☆143Updated 4 months ago
- OpenXuantie - OpenC906 Core☆338Updated 8 months ago
- Documentation for RISC-V Spike☆99Updated 6 years ago
- RISC-V RV64GC emulator designed for RTL co-simulation☆221Updated 3 months ago
- Wrapper for Rocket-Chip on FPGAs☆129Updated 2 years ago
- TinyEMU based full system cycle-level micro-architectural research simulator for single-core RISC-V systems☆148Updated 2 years ago
- IOMMU IP compliant with the RISC-V IOMMU Specification v1.0☆85Updated this week