Alternatives and similar repositories for litmus-tests-riscv:

Users that are interested in litmus-tests-riscv are comparing it to the libraries listed below

• ucb-bar / riscv-torture
  RISC-V Torture Test
  ☆186Updated 8 months ago
• riscv / riscv-CMOs
  ☆85Updated 2 years ago
• riscv-non-isa / riscv-iommu
  RISC-V IOMMU Specification
  ☆109Updated last week
• riscv-ovpsim / imperas-riscv-tests
  ☆169Updated last year
• chipsalliance / riscv-vector-tests
  Unit tests generator for RVV 1.0
  ☆79Updated this week
• bucaps / marss-riscv
  TinyEMU based full system cycle-level micro-architectural research simulator for single-core RISC-V systems
  ☆150Updated 2 years ago
• riscvarchive / riscv-aclint
  ☆42Updated 3 years ago
• csail-csg / riscy-OOO
  RiscyOO: RISC-V Out-of-Order Processor
  ☆155Updated 4 years ago
• riscv-boom / riscv-coremark
  Setup scripts and files needed to compile CoreMark on RISC-V
  ☆65Updated 8 months ago
• ppeetteerrs / gem5-RISC-V-FS-Linux
  Repository containing the guide and code for booting RISC-V full system linux using gem5.
  ☆48Updated 3 years ago
• josecm / riscv-hyp-tests
  A bare-metal application to test specific features of the risc-v hypervisor extension
  ☆37Updated last year
• poweihuang17 / Documentation_Spike
  Documentation for RISC-V Spike
  ☆100Updated 6 years ago
• YosysHQ / riscv-formal
  RISC-V Formal Verification Framework
  ☆129Updated last week
• RALC88 / riscv-vectorized-benchmark-suite
  RiVEC Bencmark Suite
  ☆113Updated 3 months ago
• openhwgroup / cva6-sdk
  CVA6 SDK containing RISC-V tools and Buildroot
  ☆63Updated 9 months ago
• chiselverify / chiselverify
  A dynamic verification library for Chisel.
  ☆146Updated 4 months ago
• cnrv / fpga-rocket-chip
  Wrapper for Rocket-Chip on FPGAs
  ☆129Updated 2 years ago
• riscv / riscv-plic-spec
  PLIC Specification
  ☆140Updated 2 years ago
• bluespec / Toooba
  RISC-V Core; superscalar, out-of-order, multi-core capable; based on RISCY-OOO from MIT
  ☆170Updated 7 months ago
• zero-day-labs / riscv-aia
  AIA IP compliant with the RISC-V AIA spec
  ☆36Updated last month
• hushenwei2000 / rvv-atg
  RISC-V Vector (RVV) Automatic Tests Generator with full instructions coverage, including self-checking test and signature test (RISC-V Co…
  ☆14Updated 11 months ago
• riscv / riscv-aia
  ☆86Updated this week
• cnrv / rocket-chip-read
  Comment on the rocket-chip source code
  ☆174Updated 6 years ago
• ovh / sv2chisel
  (System)Verilog to Chisel translator
  ☆112Updated 2 years ago
• zero-day-labs / riscv-iommu
  IOMMU IP compliant with the RISC-V IOMMU Specification v1.0
  ☆88Updated this week
• riscvarchive / riscv-code-size-reduction
  ☆150Updated last year
• chipsalliance / dromajo
  RISC-V RV64GC emulator designed for RTL co-simulation
  ☆223Updated 4 months ago
• chipsalliance / rocket-tools
  Software tools that support rocket-chip (GNU toolchain, ISA simulator, tests)
  ☆54Updated last year
• riscv-software-src / riscv-perf-model
  Example RISC-V Out-of-Order/Superscalar Processor Performance Core and MSS Model
  ☆156Updated this week
• OpenXiangShan / HuanCun
  Open-source high-performance non-blocking cache
  ☆78Updated this week