Alternatives and similar repositories for tinytapeout-06

Users that are interested in tinytapeout-06 are comparing it to the libraries listed below

• TinyTapeout / tt-multiplexer
  ☆18Updated last month
• TinyTapeout / ttihp-verilog-template
  Submission template for Tiny Tapeout IHP shuttles - Verilog HDL Projects
  ☆21Updated 6 months ago
• rolandbernard / kleine-riscv
  A small and simple rv32i core written in Verilog
  ☆14Updated 3 years ago
• sifferman / fusesoc_template
  Example of how to get started with olofk/fusesoc.
  ☆17Updated 4 years ago
• stnolting / neorv32-riscof
  ✔️ Port of RISCOF to check the NEORV32 for RISC-V ISA compatibility.
  ☆34Updated last week
• TinyTapeout / tt02-submission-template
  Submission template for TT02
  ☆25Updated 2 years ago
• YoWASP / yosys
  Unofficial Yosys WebAssembly packages
  ☆74Updated this week
• machdyne / endlos
  Endlos Computer
  ☆11Updated last year
• greatscottgadgets / bucatini
  a noodly Amaranth HDL-wrapper for FPGA SerDes' presenting a PIPE PHY interface
  ☆31Updated 3 years ago
• TinyTapeout / tinytapeout-02
  TinyTapeout-02 submission repository
  ☆28Updated last year
• TinyTapeout / tinytapeout-03
  ☆16Updated last year
• SwaggasDeCatas / emuThreeDS
  World's first Nintendo 3DS emulator for Apple devices based on Citra.
  ☆18Updated 2 years ago
• TinyTapeout / tt-support-tools
  tools used by project repos to test configuration, generate OpenLane run summaries and documentation
  ☆27Updated 2 weeks ago
• TinyTapeout / tt10-verilog-template
  Submission template for Tiny Tapeout 10 - Verilog HDL Projects
  ☆25Updated 4 months ago
• mikeakohn / riscv_fpga
  Implementation of a RISC-V CPU in Verilog.
  ☆17Updated 8 months ago
• BrunoLevy / TordBoyau
  A pipelined RISC-V processor
  ☆62Updated last year
• lushaylabs / lushay-code
  yosys, nextpnr, apicula and openFPGALoader in vscode using OSS-CAD-Suite
  ☆36Updated last year
• mattvenn / wokwi-verilog-gds-test
  ☆55Updated 3 years ago
• TinyTapeout / tt07-verilog-template
  Submission template for Tiny Tapeout 7 - Verilog HDL Projects
  ☆21Updated last year
• thinkoco / de10-nano-riscv
  A RISC-V SoC ( Hbird e203 ) on Terasic DE10-Nano
  ☆41Updated 5 years ago
• Wren6991 / NorForkConditionally
  What's the simplest CPU you can build?
  ☆35Updated 11 years ago
• tomverbeure / rt
  A Full Hardware Real-Time Ray-Tracer
  ☆109Updated 3 years ago
• olofk / subservient
  Small SERV-based SoC primarily for OpenMPW tapeout
  ☆48Updated 4 months ago
• TinyTapeout / tt-micropython-firmware
  TinyTapeout demo pcb's RP2040 functionality
  ☆14Updated 2 months ago
• antmicro / renode-verilator-integration
  This repository contains sample code integrating Renode with Verilator
  ☆23Updated 5 months ago
• algofoogle / raybox-zero
  Minimal implementation of Raybox HDL ray caster concept
  ☆27Updated 3 months ago
• MichaelBell / spi-ram-emu
  SPI RAM Emulation on Pico
  ☆32Updated 2 years ago
• suarezvictor / litex_imgui_usb_demo
  Soft USB for LiteX
  ☆50Updated 3 weeks ago
• TinyTapeout / tinytapeout_gds_viewer
  Tiny Tapeout GDS Online Viewer
  ☆21Updated last month
• sylefeb / Silixel
  Exploring gate level simulation
  ☆58Updated 6 months ago