NTHU CS6135 VLSI Physical Design Automation Course Projects (include Two-way Min-cut Partitioning, Fixed-outline Slicing Floorplan Design, Placement Legalization, Global Routing)
☆43Sep 7, 2025Updated 6 months ago
Alternatives and similar repositories for Physical_Design_Automation
Users that are interested in Physical_Design_Automation are comparing it to the libraries listed below
Sorting:
- NTHU EE6550 Machine Learning Course Projects (include Maximum A Posteriori Estimation, Linear Regression, Neural Network Image Classifica…☆10Sep 7, 2025Updated 6 months ago
- NTHU CS5656 Deep Learning Course Projects☆22Sep 7, 2025Updated 6 months ago
- NTHU CS6135 VLSI Physical Design Automation (2022 Fall)☆19Jan 20, 2023Updated 3 years ago
- NTHU CS5422 Parallel Programming Course Projects (include Odd-Even Sort, Mandelbrot Set, All-Pairs Shortest Path, Blocked All-Pairs Short…☆13Sep 7, 2025Updated 6 months ago
- Courseworks of CS6165 VLSI Physical Design Automation, NTHU.☆49Jan 23, 2021Updated 5 years ago
- NTHU CS6135 VLSI實體設計自動化☆12Mar 12, 2022Updated 4 years ago
- ICCAD-2021-B☆12Aug 5, 2021Updated 4 years ago
- Pin-Accessible Legalization for Mixed-Cell-Height Circuits☆31Feb 25, 2022Updated 4 years ago
- Official implementation of MacroRank: Ranking Macro Placement Solutions Leveraging Translation Equivariancy (ASP-DAC 2023)☆17Jun 3, 2023Updated 2 years ago
- This repo is "NTHU Parallel Programing" course project.☆10Dec 5, 2017Updated 8 years ago
- ☆14Jul 19, 2024Updated last year
- Timing prediction dataset download and instructions.☆18Jun 7, 2023Updated 2 years ago
- Flute3 is an open-source rectilinear Steiner minimum tree heuristic from Iowa State, with UFRGS improvements☆28Dec 16, 2020Updated 5 years ago
- ☆17Feb 24, 2025Updated last year
- Analog and mixed-signal automatic placer☆13Feb 14, 2023Updated 3 years ago
- An Open-Source Analytical Placer for Large Scale Heterogeneous FPGAs using Deep-Learning Toolkit☆91Apr 30, 2025Updated 10 months ago
- VLSI placement and routing tool☆15Dec 20, 2025Updated 3 months ago
- Artificial Netlist Generator☆46Mar 19, 2024Updated 2 years ago
- This is a deep-learning based model for Electronic Design Automation(EDA), predicting the congestion location.☆24Aug 28, 2024Updated last year
- VLSI EDA Global Router☆81Feb 15, 2026Updated last month
- ☆20Jan 13, 2025Updated last year
- iccad contest 2022 problem B☆16Sep 4, 2022Updated 3 years ago
- ☆61Mar 8, 2021Updated 5 years ago
- OpenROAD Agent. This repository contain the model to train and testing the model using EDA Corpus dataset.☆22Jul 24, 2025Updated 7 months ago
- AMF-Placer 2.0: An open-source timing-driven analytical mixed-size FPGA placer of heterogeneous resources (LUT/FF/LUTRAM/MUX/CARRY/DSP/BR…☆110Mar 9, 2024Updated 2 years ago
- Applying Deep Q-learning for Global Routing☆130Sep 15, 2020Updated 5 years ago
- This repository is dedicated to VLSI ASIC Design Flow using open-source tools! Here, we embark on a journey that starts with specificatio…☆30Jan 23, 2024Updated 2 years ago
- A collection of design automation algorithms, methodologies, and tools for electronics/photonics, and emerging eda technologies☆20Apr 1, 2023Updated 2 years ago
- CircuitNet: An Open-Source Dataset for Machine Learning Applications in Electronic Design Automation (EDA)☆458Jul 17, 2025Updated 8 months ago
- Public repository for Task 6 of OpenROAD project. ML-based PDN synthesis and optimization.☆36Jul 6, 2023Updated 2 years ago
- OpenROAD's Chatbot Assistant☆37Updated this week
- This repository contains all the information included in the beginner SoC/physical design using open-source EDA tools organized by VLSI S…☆13Mar 7, 2021Updated 5 years ago
- ☆14Oct 23, 2018Updated 7 years ago
- A list of our chiplet simulaters☆48Jun 22, 2025Updated 9 months ago
- A simple tool to demonstrate the physical design steps of VLSI Design Flow.☆11Dec 13, 2020Updated 5 years ago
- Official open source repository for "A Timing Engine Inspired Graph Neural Network Model for Pre-Routing Slack Prediction" (DAC 2022)☆92Aug 22, 2024Updated last year
- CATCH 1.0, Initial full release of CATCH cost model.☆16Mar 3, 2026Updated 2 weeks ago
- Xplace 3.0: An Extremely Fast, Extensible and Deterministic Placement Framework with Detailed-Routability and Timing Optimization☆158Jan 16, 2026Updated 2 months ago
- UCSD Detailed Router☆95Jan 5, 2021Updated 5 years ago