EDDRSoftware / gdsFileParser
This library is a low level parser for the GDSII file format.
☆34Updated 7 years ago
Alternatives and similar repositories for gdsFileParser:
Users that are interested in gdsFileParser are comparing it to the libraries listed below
- GDSII File Parsing, IC Layout Analysis, and Parameter Extraction☆117Updated last year
- An OASIS and GDS2 (chip layout format) binary dump tool for debugging☆40Updated 7 years ago
- Library Exchange Format (LEF) and Design Exchange Format (DEF)☆19Updated 4 years ago
- A Design Rule Checker with GPU Acceleration☆48Updated last year
- A Fast C++ Header-only Parser for Standard Parasitic Exchange Format (SPEF).☆55Updated 2 years ago
- C++ library and command-line utility for reading GDSII geometry files☆45Updated 4 years ago
- GDS to ASCII Converter☆19Updated last year
- Source code for LEF/DEF☆11Updated 6 years ago
- Python iterface for Cadence LEF/DEF parser.☆17Updated last year
- LEF/DEF-based port of Iowa State's open-source FastRoute 4.1☆54Updated 4 years ago
- Library for VLSI CAD Design Useful parsers and solvers' api are implemented.☆155Updated 3 months ago
- Circuit release of the MAGICAL project☆34Updated 5 years ago
- GDS visualization, geometry analysis, and parallelized capacitance extraction at field-solver accuracy. MS thesis project.☆21Updated 9 months ago
- A LEF/DEF Utility.☆27Updated 5 years ago
- ☆22Updated 3 years ago
- ☆22Updated 4 years ago
- ☆92Updated 5 years ago
- Database and Tool Framework for EDA☆112Updated 4 years ago
- Material for OpenROAD Tutorial at DAC 2020☆47Updated 2 years ago
- Intel's Analog Detailed Router☆38Updated 5 years ago
- Global Router Built for ICCAD Contest 2019☆30Updated 5 years ago
- VLSI EDA Global Router☆71Updated 7 years ago
- An open multiple patterning framework☆75Updated 10 months ago
- Simple and most probably incomplete parser for spectre netlists☆16Updated 8 years ago
- Qrouter detail router for digital ASIC designs☆57Updated 6 months ago
- BAG2 workspace for fake PDK (cds_ff_mpt)☆55Updated 4 years ago
- Bounded-Skew DME v1.3☆14Updated 6 years ago
- IO and Pin Placer for Floorplan-Placement Subflow☆22Updated 4 years ago
- An analytical VLSI placer☆28Updated 3 years ago
- BoxRouter2.0 is a new global router for ultimate routability. It is inspired by BoxRouter [1], but can perform multi-layer routing with 2…☆21Updated 6 years ago