Alternatives and similar repositories for FPGA-SM3-HASH

Users that are interested in FPGA-SM3-HASH are comparing it to the libraries listed below

• raymondrc / FPGA_SM4
  FPGA implementation of Chinese SM4 encryption algorithm.
  ☆54Updated 7 years ago
• crypt-xie / XCryptCore
  Implementation of cryptographic algorithm with verilog hdl(such as des,aes,sha,rsa,ecc etc.)
  ☆39Updated 5 years ago
• govindjeevan / Weighted-Round-Robin-Arbiter
  Verilog Code and Logisim simulation of a Weighted Round Robit Arbiter circuit using digital components
  ☆19Updated 7 years ago
• mematrix / AES-FPGA
  AES加密解密算法的Verilog实现
  ☆67Updated 9 years ago
• gongxunwu / sm4-verilog
  ☆23Updated 6 years ago
• xkw168 / Digital-recognition
  digital recognition base on FPGA
  ☆13Updated 5 years ago
• kdurant / axi-ddr3
  学习AXI接口，以及xilinx DDR3 IP使用
  ☆37Updated 8 years ago
• funannoka / SoC-Design-DDR3-Controller
  DDR3 SDRAM Memory Controller Design & Synthesis using System Verilog
  ☆31Updated 6 years ago
• KasuganoSoraaa / simple-AXI2AHB-bridge
  AXI master to AHB slave, support INCR/WRAP, out of standing, do not advanced feature such as support out of order, retry, split, etc
  ☆42Updated 3 years ago
• zhangkunming0216 / FIFO_-asynchronous
  异步FIFO的内部实现
  ☆24Updated 6 years ago
• lajanugen / Modular-Exponentiation
  Verilog Implementation of modular exponentiation using Montgomery multiplication
  ☆34Updated 10 years ago
• FPGA-Networking / Low-Cost-and-Programmable-CRC
  Source code of the paper "Low-Cost and Programmable CRC Implementation based on FPGA"
  ☆42Updated 4 years ago
• raymondrc / SM4-SBOX
  Verilog Implementation of SM4 s-box
  ☆21Updated 6 years ago
• Lianghao-Yuan / AHB_Bus_Matrix
  ☆36Updated 9 years ago
• letitbe0201 / AXI-DMA-master-verification
  ☆25Updated 4 years ago
• xdesigns / 4way-cache
  Verilog cache implementation of 4-way FIFO 16k Cache
  ☆20Updated 12 years ago
• seonskim / verilog_axi-interconnect
  AXI Interconnect
  ☆50Updated 3 years ago
• IA-C-Lab-Fudan / Chisel-FFT-generator
  FFT generator using Chisel
  ☆61Updated 3 years ago
• howard789 / uvm_example
  This is a uvm example. The video is available at https://www.bilibili.com/video/BV1yq4y177f6/
  ☆44Updated 3 years ago
• ptracton / AXI_BFM
  AXI4 BFM in Verilog
  ☆32Updated 8 years ago
• john9636 / SortingNetwork
  Implement a bitonic sorting network on FPGA
  ☆45Updated 3 years ago
• ljgibbslf / basic_cache_core
  ☆29Updated 4 years ago
• mfkiwl / E203_dma
  ☆10Updated 5 years ago
• ljgibbslf / SM2_core
  opensource crypto IP core
  ☆27Updated 4 years ago
• panweitao / riscvv
  an open source uvm verification platform for e200 (riscv)
  ☆28Updated 7 years ago
• brown9804 / PCIe-Physical-Layer
  Implementation of the PCIe physical layer
  ☆45Updated this week
• loghall / axi_cache
  verification of simple axi-based cache
  ☆18Updated 6 years ago
• xiaoerlang0359 / E203plus
  upgrade to e203 (a risc-v core)
  ☆44Updated 4 years ago
• abdelrhman-oun / DDR5_PHY_WriteOperation
  ☆56Updated 2 years ago
• XBQ314 / A-Number-Theoretic-Transform-Accelerator-with-Two-Parallel-Simplified-Butterfly-Units
  Implementation of Number-theoretic transform(NTT) algorithm on FPGA; 快速数论变换(NTT)的FPGA实现，基为2，有两个并行的蝶形单元
  ☆19Updated 2 years ago