Alternatives and similar repositories for sm4-verilog:

Users that are interested in sm4-verilog are comparing it to the libraries listed below

• raymondrc / FPGA-SM3-HASH
  Description of Chinese SM3 Hash algorithm with Verilog HDL
  ☆46Updated 6 years ago
• raymondrc / FPGA_SM4
  FPGA implementation of Chinese SM4 encryption algorithm.
  ☆47Updated 7 years ago
• ljgibbslf / SM2_core
  opensource crypto IP core
  ☆27Updated 4 years ago
• raymondrc / riscv-isa-extension-for-SM4
  RISC-V instruction set extensions for SM4 block cipher
  ☆19Updated 5 years ago
• crypt-xie / XCryptCore
  Implementation of cryptographic algorithm with verilog hdl(such as des,aes,sha,rsa,ecc etc.)
  ☆38Updated 5 years ago
• raymondrc / SM4-SBOX
  Verilog Implementation of SM4 s-box
  ☆20Updated 5 years ago
• lajanugen / Modular-Exponentiation
  Verilog Implementation of modular exponentiation using Montgomery multiplication
  ☆32Updated 10 years ago
• mematrix / AES-FPGA
  AES加密解密算法的Verilog实现
  ☆64Updated 9 years ago
• p4r4xor / Montgomery1024
  Verilog implementation of 1024 bit Hybrid Montgomery Multiplication/Exponentiation
  ☆10Updated 5 years ago
• kgpai94 / ECC-Encryption-System
  This is a Verilog algorithm which takes 8bits and encrypts the data for the purpose of secure communication based on the concept of Ellip…
  ☆31Updated 6 years ago
• hyperpicc / ecc
  Verilog HDL implementation of Elliptic Curve Cryptography (ECC) over GF(2^163)
  ☆18Updated 7 years ago
• eda-lab / AES-based-on-FPGA
  AES-based-on-FPGA developed by verilog.
  ☆21Updated 4 years ago
• zdszx / Modexpowering3
  a 2048 bit RSA verilog project basing on Montgomery , Karatsuba multiplier
  ☆22Updated 3 years ago
• fatestudio / RSA4096_NEW
  ☆13Updated 9 years ago
• zhangkunming0216 / FIFO_-asynchronous
  异步FIFO的内部实现
  ☆24Updated 6 years ago
• acmert / kyber-polmul-hw
  Hardware implementation of polynomial multiplication operation of CRYSTALS-KYBER PQC scheme
  ☆28Updated 3 years ago
• shiva-t / Elliptical-Curve-Cryptography-FPGA
  Implementation of ECC on FPGA-Zynq7000 SoC
  ☆17Updated 5 years ago
• acmert / parametric-ntt
  Parametric NTT/INTT Hardware Generator
  ☆67Updated 3 years ago
• scluconn / LPN-based_PUF
  FPGA implementation of a cryptographically secure physical unclonable function based on learning parity with noise problem.
  ☆15Updated 7 years ago
• ovpanait / zynq-aes
  AES hardware engine for Xilinx Zynq platform
  ☆30Updated 3 years ago
• icwiki / ahb_course
  ☆13Updated 4 years ago
• LoganBrist / C-Verilog_NTT_RNS_Polymultiplier
  ☆25Updated 4 years ago
• raiyyanfaisal09 / AHB_APB-RTL
  AHB-APB Bridge RTL Design
  ☆16Updated 6 years ago
• xiesicong / Cortex_m0
  Cortex_m0软核源码，可以在FPGA上直接跑，包含UART、定时器这些外设，可以用keil写用户代码。可以看看《Cortex-M0 全可编程SoC原理及实现》这本书
  ☆23Updated 3 years ago
• XBQ314 / A-Number-Theoretic-Transform-Accelerator-with-Two-Parallel-Simplified-Butterfly-Units
  Implementation of Number-theoretic transform(NTT) algorithm on FPGA; 快速数论变换(NTT)的FPGA实现，基为2，有两个并行的蝶形单元
  ☆17Updated 2 years ago
• KasuganoSoraaa / simple-AXI2AHB-bridge
  AXI master to AHB slave, support INCR/WRAP, out of standing, do not advanced feature such as support out of order, retry, split, etc
  ☆39Updated 2 years ago
• russdill / bch_verilog
  Verilog based BCH encoder/decoder
  ☆118Updated 2 years ago
• DawnCarol / OpenC910_Modified
  commit rtl and build cosim env
  ☆14Updated last year
• pansygrass / ecc
  Verilog for a SECDED Hsaio ECC and a DEC ECC. Power, delay, and area are compared for Berkeley MASIC EEW241B - Advanced Digital Integrate…
  ☆42Updated 9 years ago
• zhouzaixin / arm_soc
  ☆14Updated 5 years ago