alexforencich / dma-bench
☆25Updated 2 years ago
Related projects ⓘ
Alternatives and complementary repositories for dma-bench
- Pcie to AXI Bridge in Xilinx series-7 Kintex and Artix devices☆29Updated 8 years ago
- Open source FPGA-based NIC and platform for in-network compute☆58Updated 2 weeks ago
- Hamming ECC Encoder and Decoder to protect memories☆28Updated last month
- DDR3 SDRAM controller☆18Updated 10 years ago
- This is a circular buffer controller used in FPGA.☆33Updated 8 years ago
- Verilog Modules and Python Scripts for Creating IP Core Build Directories☆29Updated last year
- ☆22Updated 11 years ago
- Ethernet 10GE MAC☆44Updated 10 years ago
- Open source 10 Gigabit Ethernet MAC core compatible with Xilinx's non-free 10GMAC☆61Updated 7 years ago
- Groundhog - Serial ATA Host Bus Adapter☆21Updated 6 years ago
- This is the repository for a verilog implementation of a lzrw1 compression core☆18Updated 6 years ago
- WISHBONE DMA/Bridge IP Core☆18Updated 10 years ago
- RISCV core RV32I/E.4 threads in a ring architecture☆30Updated last year
- Checksum plays a key role in the TCP/IP headers. In this repo you'll find a efficient FPGA-based solution for a 512-bit AXI4-Stream inter…☆16Updated 5 years ago
- double_fpu_verilog☆15Updated 10 years ago
- ☆20Updated last week
- PCI Express controller model☆45Updated 2 years ago
- Ethernet switch implementation written in Verilog☆40Updated last year
- A lightweight core for the CV32E40 implementing the RISC-V vector extension specification. (v0.8)☆30Updated 3 years ago
- RTL implementation of the ethernet physical layer PCS for 10GBASE-R and 40GBASE-R.☆19Updated 10 months ago
- ASIC Design of the openSPARC Floating Point Unit☆13Updated 7 years ago
- Verilog PCI express components☆18Updated last year
- Digital Hardware Modelling using VHDL, Verilog, SystemVerilog, SystemC, HLS(C++, OpenCL)☆59Updated 3 years ago
- Verilog Ethernet components for FPGA implementation☆14Updated last year
- A simple, scalable, source-synchronous, all-digital DDR link☆19Updated 3 weeks ago
- ☆16Updated 5 years ago
- DUTH RISC-V Superscalar Microprocessor☆28Updated 3 weeks ago
- ☆47Updated 3 years ago
- An Ethernet MAC conforming to IEEE 802.3☆16Updated 7 years ago
- ☆11Updated 8 months ago