ljgibbslf / SM2_core
opensource crypto IP core
☆27Updated 4 years ago
Alternatives and similar repositories for SM2_core:
Users that are interested in SM2_core are comparing it to the libraries listed below
- FPGA implementation of Chinese SM4 encryption algorithm.☆51Updated 7 years ago
- Description of Chinese SM3 Hash algorithm with Verilog HDL☆47Updated 6 years ago
- Implementation of cryptographic algorithm with verilog hdl(such as des,aes,sha,rsa,ecc etc.)☆38Updated 5 years ago
- Implementation of ECC on FPGA-Zynq7000 SoC☆17Updated 5 years ago
- This is a Verilog algorithm which takes 8bits and encrypts the data for the purpose of secure communication based on the concept of Ellip…☆31Updated 6 years ago
- Verilog Implementation of SM4 s-box☆20Updated 5 years ago
- ☆58Updated 2 years ago
- AES加密解密算法的Verilog实现☆66Updated 9 years ago
- Must-have verilog systemverilog modules☆33Updated 2 years ago
- RISC-V instruction set extensions for SM4 block cipher☆20Updated 5 years ago
- ☆22Updated 6 years ago
- Extremely basic CortexM0 SoC based on ARM DesignStart Eval☆25Updated 6 years ago
- 视频旋转(2019FPGA大赛)☆33Updated 4 years ago
- Verilog for a SECDED Hsaio ECC and a DEC ECC. Power, delay, and area are compared for Berkeley MASIC EEW241B - Advanced Digital Integrate…☆44Updated 9 years ago
- A VerilogHDL MCU Core based ARMv6 Cortex-M0☆21Updated 5 years ago
- Verilog Code and Logisim simulation of a Weighted Round Robit Arbiter circuit using digital components☆18Updated 7 years ago
- Generic FIFO implementation with optional FWFT☆56Updated 4 years ago
- It is SATA 3 host controller. Using this you can read write to sata3 sdd/hdd from your fpga logic with simple memory like interface.☆69Updated 10 months ago
- ☆67Updated 3 years ago
- AMBA bus generator including AXI, AHB, and APB☆99Updated 3 years ago
- System Verilog and Emulation. Written all the five channels.☆33Updated 8 years ago
- DDR3 SDRAM Memory Controller Design & Synthesis using System Verilog☆31Updated 6 years ago
- Verilog HDL implementation of Elliptic Curve Cryptography (ECC) over GF(2^163)☆19Updated 7 years ago
- An FPGA-based GZIP (Deflate algorithm) compressor, which inputs raw data and outputs standard GZIP format (as known as .gz file format). …☆118Updated last year
- SDRAM controller with AXI4 interface☆90Updated 5 years ago
- Ethernet MAC 10/100 Mbps☆79Updated 5 years ago
- FPGA 同步FIFO与异步FIFO☆30Updated 6 years ago
- Gigabit MAC + UDP/TCP/IP offload Engine☆31Updated 5 years ago
- Verilog implementation of 1024 bit Hybrid Montgomery Multiplication/Exponentiation☆10Updated 5 years ago
- UART -> AXI Bridge☆60Updated 3 years ago