Implementation of ECC on FPGA-Zynq7000 SoC
☆19Jul 12, 2019Updated 6 years ago
Alternatives and similar repositories for Elliptical-Curve-Cryptography-FPGA
Users that are interested in Elliptical-Curve-Cryptography-FPGA are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- This is a Verilog algorithm which takes 8bits and encrypts the data for the purpose of secure communication based on the concept of Ellip…☆30Sep 24, 2018Updated 7 years ago
- Verilog HDL implementation of Elliptic Curve Cryptography (ECC) over GF(2^163)☆22Oct 31, 2017Updated 8 years ago
- A VHDL IP for ECC (Elliptic Curve Cryptography) hardware acceleration☆49Nov 24, 2025Updated 7 months ago
- An end-to-end chip authentication architecture based on SRAM PUF and public key cryptography.☆17Nov 22, 2019Updated 6 years ago
- Verilog for a SECDED Hsaio ECC and a DEC ECC. Power, delay, and area are compared for Berkeley MASIC EEW241B - Advanced Digital Integrate…☆55Apr 29, 2015Updated 11 years ago
- Bare Metal GPUs on DigitalOcean Gradient AI • AdPurpose-built for serious AI teams training foundational models, running large-scale inference, and pushing the boundaries of what's possible.
- A final semester based group project for EE4218: Embedded Hardware System Design module in NUS where I worked with my teammate to perform…☆21May 4, 2023Updated 3 years ago
- Research Interan@BARC FPGA based High-Throughput Generic ECC Implementation in Binary Extension Field☆23Feb 20, 2017Updated 9 years ago
- Hardware Trojan on a Basis 3 FPGA for Hardware and Embedded Systems Security☆11May 1, 2017Updated 9 years ago
- Implementation of RSA algorithm on FPGA using Verilog☆27Aug 1, 2018Updated 7 years ago
- HDL implementation of a pipelined multilayer perceptron (neural network)☆17Sep 14, 2015Updated 10 years ago
- Golang package for PCI Express data transfers☆13Apr 24, 2018Updated 8 years ago
- Error correction and detection example Verilog (hamming and Reed-Solomon) to accompany presentation material☆10Jan 14, 2024Updated 2 years ago
- Open Source Bitcoin Vanity Address Generation on FPGAs☆33Jan 29, 2022Updated 4 years ago
- FPGA implementation of Chinese SM4 encryption algorithm.☆57Mar 11, 2018Updated 8 years ago
- Wordpress hosting with auto-scaling - Free Trial Offer • AdFully Managed hosting for WordPress and WooCommerce businesses that need reliable, auto-scalable performance. Cloudways SafeUpdates now available.
- The verilog code together with cocotb testbench of BFU unit of a DIF FFT processor☆15Apr 11, 2023Updated 3 years ago
- an sata controller using smallest resource.☆17Feb 5, 2014Updated 12 years ago
- A simple tool to demonstrate the physical design steps of VLSI Design Flow.☆11Dec 13, 2020Updated 5 years ago
- SQRL Port of ethminer☆11Feb 1, 2021Updated 5 years ago
- A simple implementation of the Karatsuba multiplication algorithm☆12Apr 2, 2025Updated last year
- VHDL implementation of RSA encryption/decryption using Montgomery modular multipliers☆24Apr 15, 2016Updated 10 years ago
- RISC-V-5 stage pipelined in verilog☆10Jul 24, 2020Updated 5 years ago
- Description of Chinese SM3 Hash algorithm with Verilog HDL☆55Aug 5, 2018Updated 7 years ago
- Expansion board for the EBAZ4205 bitcoin miner. It includes a HDMI output, FT2232H based JTAG programmer and UART, 12V to 5V buck convert…☆17Apr 27, 2025Updated last year
- AI Agents on DigitalOcean Gradient AI Platform • AdBuild production-ready AI agents using customizable tools or access multiple LLMs through a single endpoint. Create custom knowledge bases or connect external data.
- Verilog implementation of 1024 bit Hybrid Montgomery Multiplication/Exponentiation☆14Nov 28, 2019Updated 6 years ago
- Instruction and files for porting Arm DesignStart to CW305.☆17Dec 6, 2023Updated 2 years ago
- Implementation of the SHA256 Algorithm in Verilog☆39Jan 2, 2012Updated 14 years ago
- A custom coprocessor and SoC for hardware security experiments in electronics.☆12May 20, 2017Updated 9 years ago
- Spiking Neural Network Accelerator☆15May 18, 2022Updated 4 years ago
- A ReactJS boilerplate that includes Apollo-Client and GraphQL Server configuration☆13Mar 18, 2025Updated last year
- Implementation of cryptographic algorithm with verilog hdl(such as des,aes,sha,rsa,ecc etc.)☆43Dec 1, 2019Updated 6 years ago
- NewHope key exchange mechanism implementation on Cortex-M series microcontrollers.☆13Aug 4, 2016Updated 9 years ago
- Present Crypto Engine in Verilog☆12Feb 27, 2016Updated 10 years ago
- Deploy to Railway using AI coding agents - Free Credits Offer • AdUse Claude Code, Codex, OpenCode, and more. Autonomous software development now has the infrastructure to match with Railway.
- Embedded facial recognition system involving PYNQ board, Webcam, and HDMI output.☆11May 10, 2018Updated 8 years ago
- Arduino library for interfacing with 23K256 and 23LC1024 SRAM chips from Arduino☆17Nov 29, 2013Updated 12 years ago
- OpenFPGA ICE40UP5K☆36Aug 8, 2020Updated 5 years ago
- Hardware Design, Exploration, and Code Generation for SoC Designers☆12Dec 15, 2019Updated 6 years ago
- Programmatically control ROS Bag files.☆13Sep 5, 2017Updated 8 years ago
- Very simple Cortex-M1 SoC design based on ARM DesignStart☆18Jan 25, 2022Updated 4 years ago
- Hardware Security Labs☆31May 3, 2017Updated 9 years ago