☆25Aug 11, 2021Updated 4 years ago
Alternatives and similar repositories for NTRU_NTT_HW
Users that are interested in NTRU_NTT_HW are comparing it to the libraries listed below
Sorting:
- Implementation of Number-theoretic transform(NTT) algorithm on FPGA; 快速数论变换(NTT)的FPGA实现,基为2,有两个并行的蝶形单元☆19Sep 16, 2022Updated 3 years ago
- ☆27Feb 8, 2022Updated 4 years ago
- Parametric NTT/INTT Hardware Generator☆80Apr 3, 2021Updated 4 years ago
- Verilog Implementation of the Number Theoretic Transform (NTT) and its inverse operation (INTT) utilizing modulo arithmetic for lattice-b…☆18Nov 18, 2025Updated 3 months ago
- Employed into Crystal-Kyber Algorithm, a prominent Lattice-based Post Quantum Cryptography(PQC) algorithm, for polynomial multiplication …☆19Feb 28, 2025Updated last year
- ☆36Aug 1, 2024Updated last year
- Python implementations of various NTT/INTT and NTT-based polynomial multiplication algorithms☆37Aug 17, 2020Updated 5 years ago
- A 32 point radix-2 FFT module written in Verilog☆25Jun 28, 2020Updated 5 years ago
- ChipScope / ILA using XVC (XIlinx Virtual Cable Over PCIe) with a PR (Partial Reconfiguration) design Example.☆14Jun 1, 2017Updated 8 years ago
- ☆28Aug 31, 2023Updated 2 years ago
- A repository for code used in the paper "On the precision loss in approximate homomorphic encryption"☆10Jan 16, 2025Updated last year
- High-speed full CRYSTALS-DILITHIUM implementation on FPGA: Keygen, Sign, Verify.☆78Nov 30, 2022Updated 3 years ago
- Xilinx JTAG Toolchain on Digilent Arty board☆17Mar 15, 2018Updated 7 years ago
- Hardware implementation of polynomial multiplication operation of CRYSTALS-KYBER PQC scheme☆42Jan 20, 2022Updated 4 years ago
- Pipeline FFT Implementation in Verilog HDL☆162Apr 14, 2019Updated 6 years ago
- Multi-threaded 32-bit embedded core family.☆24Jul 9, 2012Updated 13 years ago
- Python Utilities to use Xilinx Vivado Tools from Python Scripts☆22Oct 18, 2020Updated 5 years ago
- ☆25Feb 20, 2024Updated 2 years ago
- An Implementation of the Number Theoretic Transform☆51Aug 23, 2023Updated 2 years ago
- Description of Chinese SM3 Hash algorithm with Verilog HDL☆54Aug 5, 2018Updated 7 years ago
- PNG encoder, implemented in VHDL☆23Mar 30, 2024Updated last year
- Cheddar: A Swift Fully Homomorphic Encryption (FHE) GPU Library☆48Jan 14, 2026Updated last month
- OpenFHE-Based Examples of Logistic Regression Training using Nesterov Accelerated Gradient Descent☆32May 21, 2025Updated 9 months ago
- Repo for code developed during the HEAT project (Homomorphic Encryption Applications Technology)☆65Aug 25, 2020Updated 5 years ago
- Source Code for the paper Titled FASTHash: FPGA-Based High Throughput Parallel Hash Table published in ISC high performance 2020☆27Apr 11, 2022Updated 3 years ago
- A list of VHDL codes implementing cryptographic algorithms☆27Nov 29, 2021Updated 4 years ago
- A homomorphic encryption accelerator for fast matrix-vector product☆33Sep 5, 2023Updated 2 years ago
- Simple Python implementation of BFV Homomorphic Encryption Scheme☆31Feb 19, 2021Updated 5 years ago
- DDR3 SDRAM Memory Controller Design & Synthesis using System Verilog☆32Nov 6, 2018Updated 7 years ago
- ☆33Apr 30, 2023Updated 2 years ago
- FPGA Low latency 10GBASE-R PCS☆12May 23, 2023Updated 2 years ago
- The SEAL-CPU backend is a Reference backend engine for HEBench which is a shared library that implements the required functions specified…☆11Mar 3, 2023Updated 3 years ago
- A VHDL IP for ECC (Elliptic Curve Cryptography) hardware acceleration☆46Nov 24, 2025Updated 3 months ago
- Utilities for Avalon Memory Map☆11Jul 11, 2024Updated last year
- This project is designed to delay the output of the video stream in AXI-STREAM format.☆12Jul 14, 2024Updated last year
- A project demonstrate how to config ad9361 to TX mode☆11Dec 9, 2018Updated 7 years ago
- mirror of https://git.elphel.com/Elphel/eddr3☆42Oct 16, 2017Updated 8 years ago
- ☆145Oct 3, 2020Updated 5 years ago
- A little book on General Relativity and Einstein–Cartan Theory☆16Mar 13, 2014Updated 11 years ago