Alternatives and similar repositories for NTRU_NTT_HW

Users that are interested in NTRU_NTT_HW are comparing it to the libraries listed below

• XBQ314 / A-Number-Theoretic-Transform-Accelerator-with-Two-Parallel-Simplified-Butterfly-Units
  Implementation of Number-theoretic transform(NTT) algorithm on FPGA; 快速数论变换(NTT)的FPGA实现，基为2，有两个并行的蝶形单元
  ☆19Updated 3 years ago
• momalab / CoPHEE
  CoPHEE is a Co-processor for Partially Homomorphic Encrypted Encryption.
  ☆36Updated last year
• alibaba-damo-academy / damo_ctl_cham
  ☆26Updated 2 years ago
• acmert / parametric-ntt
  Parametric NTT/INTT Hardware Generator
  ☆77Updated 4 years ago
• florianhirner / proteus
  ☆23Updated last year
• kemalderya / pqc-param-ntt
  ☆25Updated 3 years ago
• chipsalliance / adams-bridge
  Post-Quantum Cryptography IP Core (Crystals-Dilithium)
  ☆40Updated last month
• xiang-rc / cfntt_ref
  ☆36Updated last year
• flokrieger / Aloha-HE
  ☆28Updated 3 months ago
• hadipourh / CryptoHDL
  A list of VHDL codes implementing cryptographic algorithms
  ☆27Updated 4 years ago
• secworks / sha3
  FIPS 202 compliant SHA-3 core in Verilog
  ☆23Updated 5 years ago
• eriksargent / PUF-lab
  FPGA implementation of a physical unclonable function for authentication
  ☆33Updated 8 years ago
• scluconn / DA_PUF_Library
  Defense/Attack PUF Library (DA PUF Library)
  ☆54Updated 5 years ago
• DHLSan / FastHomNAND
  Acceleration of TFHE-based Homomorphic NAND Gate on FPGA
  ☆18Updated 4 years ago
• mjosaarinen / lwaes_isa
  [HISTORICAL] A Lightweight (RISC-V) ISA Extension for AES and SM4
  ☆36Updated 4 years ago
• lajanugen / Modular-Exponentiation
  Verilog Implementation of modular exponentiation using Montgomery multiplication
  ☆36Updated 11 years ago
• acmert / kyber-polmul-hw
  Hardware implementation of polynomial multiplication operation of CRYSTALS-KYBER PQC scheme
  ☆37Updated 3 years ago
• ljhsiun2 / EllipticCurves_SystemVerilog
  Elgamal's over Elliptic Curves
  ☆19Updated 6 years ago
• KULeuven-COSIC / Griffinfly-ZPRIZE-FPGA-NTT
  Griffinfly is COSIC's submission to the ZPRIZE competition under the category, Accelerating NTT Operations on an FPGA by Michiel Van Beir…
  ☆11Updated 2 years ago
• KULeuven-COSIC / HEAT
  Repo for code developed during the HEAT project (Homomorphic Encryption Applications Technology)
  ☆63Updated 5 years ago
• pq-crypto / vpqc
  processor for post-quantum cryptography
  ☆17Updated 5 years ago
• LoganBrist / C-Verilog_NTT_RNS_Polymultiplier
  ☆26Updated 5 years ago
• ecelab-org / Split-Chip_authentication
  An end-to-end chip authentication architecture based on SRAM PUF and public key cryptography.
  ☆17Updated 6 years ago
• NikhilRout / NTT-FPGA
  Verilog Implementation of the Number Theoretic Transform (NTT) and its inverse operation (INTT) utilizing modulo arithmetic for lattice-b…
  ☆14Updated 3 weeks ago
• IFM-Ulm / ro-pr-fw
  Framework based on Partial Reconfiguration for chip characterization utilizing ring-oscillator PUFs
  ☆12Updated 5 years ago
• kinap / AES-Processor
  AES crypto engine written in System Verilog and emulated on the Mentor Veloce. First place winner of Mentor Graphics Need For Speed Emula…
  ☆16Updated 8 years ago
• p4r4xor / Montgomery1024
  Verilog implementation of 1024 bit Hybrid Montgomery Multiplication/Exponentiation
  ☆11Updated 6 years ago
• shiva-t / Elliptical-Curve-Cryptography-FPGA
  Implementation of ECC on FPGA-Zynq7000 SoC
  ☆19Updated 6 years ago
• raymondrc / FPGA_SM4
  FPGA implementation of Chinese SM4 encryption algorithm.
  ☆56Updated 7 years ago
• Csuk0914 / dnn-rtl
  Verilog RTL Implementation of DNN
  ☆10Updated 7 years ago