☆32Apr 13, 2026Updated this week
Alternatives and similar repositories for he-soc
Users that are interested in he-soc are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- Linux on RISC-V on FPGA (LOROF): RV64GC Sv39 Quad-Core Superscalar Out-of-Order Virtual Memory CPU☆17Feb 23, 2026Updated last month
- RISC-V vector and tensor compute extensions for Vortex GPGPU acceleration for ML workloads. Optimized for transformer models, CNNs, and g…☆23Apr 25, 2025Updated 11 months ago
- IOPMP IP☆25Jul 11, 2025Updated 9 months ago
- ☆14Nov 9, 2023Updated 2 years ago
- A mixed-criticality platform built around Cheshire, with a number of safety/security and predictability features. Ready-to-use FPGA flow …☆126Apr 1, 2026Updated 2 weeks ago
- Virtual machines for every use case on DigitalOcean • AdGet dependable uptime with 99.99% SLA, simple security tools, and predictable monthly pricing with DigitalOcean's virtual machines, called Droplets.
- UVM components for DSP tasks (MODulation/DEModulation)☆15Mar 2, 2022Updated 4 years ago
- A minimal Linux-capable 64-bit RISC-V SoC built around CVA6☆328Updated this week
- Microarchitectural control flow integrity (𝜇CFI) verification checks whether there exists a control or data flow from instruction's ope…☆16Feb 12, 2026Updated 2 months ago
- Modified version of PULP Ara to support Vector Cryptography (Zvk) Instructions☆17Jan 21, 2026Updated 2 months ago
- ☆13Nov 20, 2025Updated 4 months ago
- CV32E40X Design-Verification environment☆16Mar 25, 2024Updated 2 years ago
- AIA IP compliant with the RISC-V AIA spec☆46Jan 27, 2025Updated last year
- Azadi (Freedom) is a 32-bit RISC-V CPU based System on Chip.☆32Aug 28, 2023Updated 2 years ago
- A guide on how to build and use a set of Bao guest configurations for various platforms☆52Mar 21, 2026Updated 3 weeks ago
- Wordpress hosting with auto-scaling - Free Trial • AdFully Managed hosting for WordPress and WooCommerce businesses that need reliable, auto-scalable performance. Cloudways SafeUpdates now available.
- DUTH RISC-V Superscalar Microprocessor☆34Oct 23, 2024Updated last year
- Linux kernel source tree☆21Mar 26, 2026Updated 3 weeks ago
- Input / Output Physical Memory Protection Unit for RISC-V☆15Jul 20, 2023Updated 2 years ago
- Alpha64 R10000 Two-Way Superscalar Processor☆12May 6, 2019Updated 6 years ago
- Neural Turing Machine for a Multi-Processor System on Chip verified with UVM/OSVVM/FV☆12Apr 11, 2026Updated last week
- TuRTLe: A Unified Evaluation of LLMs for RTL Generation 🐢 (MLCAD 2025)☆42Feb 23, 2026Updated last month
- A Xtext based SystemRDL editor with syntax highlighting and context sensitive help☆12Feb 9, 2024Updated 2 years ago
- 2-8bit weights, 8-bit activations flexible Neural Processing Engine for PULP clusters☆31Jan 29, 2026Updated 2 months ago
- JPEG图像压缩在STM32平台的实现,包含主要算法,但未创建文件信息部分,不是严格意义上的JPEG。☆19Aug 28, 2019Updated 6 years ago
- Deploy open-source AI quickly and easily - Bonus Offer • AdRunpod Hub is built for open source. One-click deployment and autoscaling endpoints without provisioning your own infrastructure.
- ☆21May 8, 2025Updated 11 months ago
- High quality and composable RTL libraries in SystemVerilog☆32Apr 10, 2026Updated last week
- RISC-V Integrated Matrix Development Repository☆22Mar 31, 2026Updated 2 weeks ago
- ☆20Mar 10, 2026Updated last month
- ☆102Mar 5, 2026Updated last month
- A Rocket-based RISC-V superscalar in-order core☆38Mar 11, 2026Updated last month
- Designing a Multi-Agent Fabric Integration Architecture to run on de10-lite FPGA.☆17Feb 2, 2026Updated 2 months ago
- Tightly-coupled cache coherence unit for CVA6 using the ACE protocol☆38May 4, 2024Updated last year
- Contains the code for the Flexus cycle-accurate simulator, used in QFlex.☆14Mar 30, 2026Updated 2 weeks ago
- GPUs on demand by Runpod - Special Offer Available • AdRun AI, ML, and HPC workloads on powerful cloud GPUs—without limits or wasted spend. Deploy GPUs in under a minute and pay by the second.
- Pulp virtual platform☆24Jul 16, 2025Updated 9 months ago
- The framework for next generation data center.☆30Aug 24, 2025Updated 7 months ago
- A Virtual platform using DBT-RISE-RISCV capable of running unmodified FreeRTOS☆14Jan 30, 2024Updated 2 years ago
- Cluster-level matrix unit integration into GPUs, implemented in Chipyard SoC☆53Jan 20, 2026Updated 2 months ago
- muRISCV-NN is a collection of efficient deep learning kernels for embedded platforms and microcontrollers.☆97Oct 6, 2025Updated 6 months ago
- Open-source AI Accelerator Stack integrating compute, memory, and software — from RTL to PyTorch.☆25Updated this week
- ☆22Mar 27, 2026Updated 3 weeks ago