hdl / conda-edaView external linksLinks
Conda recipes for FPGA EDA tools for simulation, synthesis, place and route and bitstream generation.
☆101Jan 30, 2025Updated last year
Alternatives and similar repositories for conda-eda
Users that are interested in conda-eda are comparing it to the libraries listed below
Sorting:
- Conda + KLayout☆11Aug 21, 2022Updated 3 years ago
- An abstraction library for interfacing EDA tools☆750Updated this week
- FPGA tool performance profiling☆105Feb 24, 2024Updated last year
- skywater 130nm pdk☆41Updated this week
- SystemVerilog 2017 Pre-processor, Parser, Elaborator, UHDM Compiler. Provides IEEE Design/TB C/C++ VPI and Python AST & UHDM APIs. Compil…☆445Sep 6, 2025Updated 5 months ago
- ☆173Jul 24, 2023Updated 2 years ago
- ☆15Oct 24, 2019Updated 6 years ago
- ☆10Sep 7, 2023Updated 2 years ago
- Primitives for GF180MCU provided by GlobalFoundries.☆56Aug 28, 2023Updated 2 years ago
- ☆12Jan 25, 2023Updated 3 years ago
- Easy access to OpenSource TCAD Tools☆43Dec 27, 2025Updated last month
- Cross EDA Abstraction and Automation☆41Nov 17, 2025Updated 2 months ago
- Plugins for Yosys developed as part of the F4PGA project.☆83May 14, 2024Updated last year
- This repository contain source code for ngspice and ghdl integration☆34Jan 5, 2025Updated last year
- UBC Siepic Ebeam PDK from edx course☆33Feb 6, 2026Updated last week
- Test suite designed to check compliance with the SystemVerilog standard.☆356Updated this week
- 9 track standard cells for GF180MCU provided by GlobalFoundries.☆18Dec 5, 2022Updated 3 years ago
- Structural Netlist API (and more) for EDA post synthesis flow development☆134Updated this week
- Project 1.1 Simulate a Skywater 130nm standard cell using ngspice☆14Jul 18, 2025Updated 6 months ago
- PDK installer for open-source EDA tools and toolchains. Distributed with setups for the SkyWater 130nm and Global Foundries 180nm open p…☆390Jan 3, 2026Updated last month
- ☆44Jan 26, 2020Updated 6 years ago
- OpenDesign Flow Database☆17Oct 31, 2018Updated 7 years ago
- ELVE : ELVE Logic Visualization Engine☆11Jul 2, 2017Updated 8 years ago
- An open source, parameterized SystemVerilog digital hardware IP library☆33May 26, 2024Updated last year
- FOSS Flow For FPGA☆423Jan 6, 2025Updated last year
- A tool to generate optimized hardware files for univariate functions.☆29Apr 5, 2024Updated last year
- magma circuits☆265Oct 19, 2024Updated last year
- Universal Hardware Data Model. A complete modeling of the IEEE SystemVerilog Object Model with VPI Interface, Elaborator, Serialization, …☆249Sep 6, 2025Updated 5 months ago
- 130nm BiCMOS Open Source PDK, dedicated for Analog, Mixed Signal and RF Design. Documentation is here:☆674Feb 3, 2026Updated last week
- Build Customized FPGA Implementations for Vivado☆355Updated this week
- Raw data collected about the SKY130 process technology.☆61May 7, 2023Updated 2 years ago
- GUI for SymbiYosys☆17Oct 13, 2025Updated 4 months ago
- An MLIR-based compiler from C/C++ to AMD-Xilinx Versal AIE☆18Aug 5, 2022Updated 3 years ago
- Repository containing the DSP gateware cores☆14Feb 6, 2026Updated last week
- Fast Verilog/VHDL parser preprocessor and code generator for C++/Python based on ANTLR4☆315Jun 30, 2025Updated 7 months ago
- FPU Generator☆20Jul 19, 2021Updated 4 years ago
- ☆20Jun 23, 2024Updated last year
- SMT-based Simultaneous Place-&-Route for Standard Cell Synthesis for PROBE 2.0☆19Jul 22, 2020Updated 5 years ago
- Hammer: Highly Agile Masks Made Effortlessly from RTL☆311Feb 4, 2026Updated last week