hdl / conda-edaLinks
Conda recipes for FPGA EDA tools for simulation, synthesis, place and route and bitstream generation.
☆101Updated 5 months ago
Alternatives and similar repositories for conda-eda
Users that are interested in conda-eda are comparing it to the libraries listed below
Sorting:
- FPGA tool performance profiling☆102Updated last year
- Hardware Description Library☆81Updated 3 months ago
- Tools for working with circuits as graphs in python☆121Updated last year
- ☆79Updated 2 years ago
- Version manager (and builder) for the Google sky130 and gf180mcu open-source PDKs☆66Updated 3 weeks ago
- Coriolis VLSI EDA Tool (LIP6)☆68Updated last week
- Create fast and efficient standard cell based adders, multipliers and multiply-adders.☆115Updated last year
- Workshop on Open-Source EDA Technology (WOSET)☆49Updated 7 months ago
- A flexible framework for analyzing and transforming FPGA netlists. Official repository.☆95Updated 5 months ago
- Netgen complete LVS tool for comparing SPICE or verilog netlists☆120Updated last month
- Primitives for GF180MCU provided by GlobalFoundries.☆51Updated last year
- A SystemVerilog source file pickler.☆59Updated 8 months ago
- Builds, flow and designs for the alpha release☆54Updated 5 years ago
- ☆55Updated last year
- ☆92Updated 6 years ago
- SOFA (Skywater Opensource FPGAs) based on Skywater 130nm PDK and OpenFPGA☆139Updated 2 years ago
- Standard Cell Library based Memory Compiler using FF/Latch cells☆151Updated last week
- BAG framework☆41Updated 11 months ago
- A complete open-source design-for-testing (DFT) Solution☆161Updated last month
- Structural Netlist API (and more) for EDA post synthesis flow development☆111Updated this week
- SystemVerilog frontend for Yosys☆135Updated last week
- Plugins for Yosys developed as part of the F4PGA project.☆83Updated last year
- ☆41Updated 2 years ago
- AMC: Asynchronous Memory Compiler☆49Updated 5 years ago
- Library of open source Process Design Kits (PDKs)☆48Updated 3 weeks ago
- ☆42Updated 4 months ago
- XSCHEM symbol libraries for the Google-Skywater 130nm process design kit.☆63Updated 2 weeks ago
- A Standalone Structural Verilog Parser☆93Updated 3 years ago
- ☆44Updated 5 years ago
- ideas and eda software for vlsi design☆50Updated 3 weeks ago