Alternatives and similar repositories for litehyperbus

Users that are interested in litehyperbus are comparing it to the libraries listed below

• clairexen / picorv
  PicoRV
  ☆43Updated 5 years ago
• xobs / coriolis
  An alternative PnR system, or at least an attempt to get it running on Ubuntu 18.04.
  ☆10Updated 7 years ago
• whitequark / icefloorplan
  iCE40 floorplan viewer
  ☆24Updated 7 years ago
• m-labs / nmigen-stdio
  Industry standard I/O for nMigen
  ☆12Updated 5 years ago
• YosysHQ / padring
  A padring generator for ASICs
  ☆25Updated 2 years ago
• enjoy-digital / liteiclink
  Small footprint and configurable Inter-Chip communication cores
  ☆66Updated 2 months ago
• m-labs / nmigen-soc
  System on Chip toolkit for nMigen
  ☆19Updated 5 years ago
• enjoy-digital / litesata_axiom
  ☆13Updated 4 years ago
• icebreaker-fpga / icebreaker-amaranth-examples
  This repository contains iCEBreaker examples for Amaranth HDL.
  ☆39Updated 2 years ago
• azonenberg / antikernel-ipcores
  FPGA IP cores for the Antikernel OS, intended to be included as a submodule in SoC integrations
  ☆69Updated 2 weeks ago
• antmicro / verilator-uvm-example
  Example of how to use UVM with Verilator
  ☆30Updated 3 weeks ago
• mmicko / cross-fpga
  Cross compile FPGA tools
  ☆21Updated 4 years ago
• lambdaconcept / lambdaUSB
  A configurable USB 2.0 device core
  ☆32Updated 5 years ago
• daveshah1 / ElasticC
  lightweight open HLS for FPGA rapid prototyping
  ☆20Updated 7 years ago
• www-asics-ws / usb1_device
  USB 1.1 Device IP Core
  ☆21Updated 8 years ago
• GuzTech / misato
  RISC-V Processor written in Amaranth HDL
  ☆39Updated 3 years ago
• colognechip / gatemate_ila
  The ILA allows you to perform in-system debugging of your designs on the GateMate FPGA at runtime. All signals of your design inside the …
  ☆58Updated last month
• chili-chips-ba / openCologne-PCIE
  The first-ever opensource RTL core for PCIE EndPoint. Without vendor-locked HMs for Data Link, Transaction, Application layers; With stan…
  ☆52Updated last week
• htfab / rotfpga
  A reconfigurable logic circuit made of identical rotatable tiles.
  ☆23Updated 4 years ago
• cloudxcc / Arduissimo
  Open source MPSoC running 620 MIPS (CHStone) of RISC-V (RV32iMC) programms on the ARTY board (XC7A35T).
  ☆22Updated 6 years ago
• wyvernSemi / usbModel
  USB virtual model in C++ for Verilog
  ☆32Updated last year
• YosysHQ / yosys-plugins
  Yosys Plugins
  ☆22Updated 6 years ago
• gsomlo / yoloRISC
  A RocketChip rv64imac blinky for yosys/nextpnr/trellis & the Lattice ECP5 fpga
  ☆26Updated 6 years ago
• m-labs / microscope
  Finding the bacteria in rotting FPGA designs.
  ☆14Updated 5 years ago
• YosysHQ / prjpeppercorn
  Project Peppercorn - GateMate FPGA Bitstream Documentation
  ☆30Updated last week
• lambdaconcept / lambdasoc
  ☆44Updated 9 months ago
• dbhi / vboard
  Virtual development board for HDL design
  ☆42Updated 2 years ago
• sparrowgrine / prjtritium
  ☆22Updated 3 years ago
• hdl / constraints
  Constraint files for Hardware Description Language (HDL) designs targeting FPGA boards
  ☆46Updated last week
• ydnatag / nmigen-cocotb
  cocotb extension for nMigen
  ☆17Updated 3 years ago