taoyilee / pcell
pcells for various magnetic passive devices (GPL v3)
☆12Updated 11 years ago
Alternatives and similar repositories for pcell:
Users that are interested in pcell are comparing it to the libraries listed below
- This library is a low level parser for the OpenAccess file format.☆15Updated 7 years ago
- Parametric layout generator for digital, analog and mixed-signal integrated circuits☆54Updated this week
- Donald Amundson's Python interface to OpenAccess IC design data API☆16Updated 14 years ago
- ☆17Updated last year
- Python port of Prof. Boris Murmann's gm/ID Starter Kit☆54Updated 7 years ago
- Reads a Cadence techfile into KLayout and produces layer properties from it☆23Updated last year
- A fake "technology" to play with☆18Updated 3 years ago
- A tiny Python package to parse spice raw data files.☆51Updated 2 years ago
- An innovative Verilog-A compiler☆19Updated last week
- Analog and RF blocks on Skywaters 130nm☆11Updated 2 years ago
- MOSIS MPW Test Data and SPICE Models Collections☆34Updated 5 years ago
- Interchange formats for chip design.☆29Updated 3 weeks ago
- How to correctly write a flicker-noise model for RF simulation.☆20Updated 2 years ago
- Python interface to Cadence Virtuoso data☆14Updated 11 years ago
- Cadence Virtuoso Design Management System☆34Updated 2 years ago
- Design of Analog Blocks in Skywaters 130nm meeting corners: different flavors of OTA, BandGap, LDO.☆27Updated 2 years ago
- Python package for IBIS-AMI model development and testing☆28Updated last week
- Python library for KLayout (https://www.klayout.de/)☆24Updated 5 years ago
- Python script to draw GDS cells of planar baluns☆11Updated 2 years ago
- Simple 3D layout viewer for KLayout (Salt package)☆20Updated 6 years ago
- ☆22Updated 4 years ago
- Skywater 130nm Klayout Device Generators PDK☆31Updated 9 months ago
- Jupyter kernel for Cadence SKILL☆22Updated 8 years ago
- Files for Advanced Integrated Circuits☆28Updated last month
- Verilog-A simulation models☆68Updated 3 months ago
- FastCap is the premium capacitance solver originally developed at M.I.T. on Unix platform. A de-facto golden reference standard, FastCap …☆47Updated 9 years ago
- Generic Process Design Kit for Gdsfactory☆19Updated 11 months ago
- components and examples for creating radio ICs using the open skywater 130nm PDK☆18Updated 4 years ago
- GDS to ASCII Converter☆19Updated last year
- Online viewer of Xschem schematic files☆22Updated 4 months ago