Solve one design problem each day for a month
☆56Feb 3, 2023Updated 3 years ago
Alternatives and similar repositories for Analog-IC-Design-Problems
Users that are interested in Analog-IC-Design-Problems are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- Fundamental analog circuit designs to kick start and embark the journey in the world of IC design.☆34Aug 31, 2023Updated 3 years ago
- This project shows the design of a frequency synthesizer PLL system that produces a 1.92 GHz signal with a reference input of 30 MHz, wit…☆99Jun 12, 2023Updated 3 years ago
- This project is about designing a 1.5 bit stage Pipeline ADC & the OpAmp required for its MDAC.☆48Mar 2, 2022Updated 4 years ago
- ☆126Aug 1, 2026Updated 3 months ago
- A Fractional Divider with Delta-Sigma Modulator and Dual-Mode Divider for Phase-Locked Loop☆16Apr 25, 2021Updated 5 years ago
- Deploy to Railway using AI coding agents - Free Credits Offer • AdUse Claude Code, Codex, OpenCode, and more. Autonomous software development now has the infrastructure to match with Railway.
- This project shows how to model a 10-bit pipeline ADC and a 10-bit DAC using ideal components. Used vdc, vpulse, vcvs, switch, res, cap, …☆42Apr 7, 2019Updated 7 years ago
- PLL Designs on Skywater 130nm MPW☆26Dec 3, 2023Updated 2 years ago
- A 66-order (67 taps) hamming FIR LPF Filter is to be designed with a cutoff frequency of 200 KHZ for a sampling frequency of 1 MHZ☆15Feb 17, 2023Updated 3 years ago
- This project shows how to model a 4-bit flash ADC and a 4-bit DAC using ideal components. Used vdc, vpulse, vcvs, switch, res, cap, vccs …☆23Apr 20, 2019Updated 7 years ago
- An Open-Source ASIC Design Template for the SG13G2 IHP Open-PDK☆21Jul 21, 2026Updated 3 months ago
- Repository for VSD-IAT Workshop: Physical Verification using SKY130☆10Aug 15, 2021Updated 5 years ago
- This project discusses the design of an 8-bit asynchronous successive approximation register (SAR) analog-to-digital converter (ADC) impl…☆247Nov 13, 2024Updated last year
- This project shows the design process of the main blocks of a typical RX frontend system.☆32Jan 2, 2021Updated 5 years ago
- gm/Id design toolkit: lookup tables, design charts, and automated multicorner sizing of analog circuits☆168Sep 22, 2026Updated last month
- Deploy open-source AI quickly and easily - Special Bonus Offer • AdRunpod Hub is built for open source. One-click deployment and autoscaling endpoints without provisioning your own infrastructure.
- Design of 4KB(1024*32) SRAM with operating voltage 1.8v and access time < 2.5ns☆17Dec 8, 2020Updated 5 years ago
- ☆31Jan 31, 2021Updated 5 years ago
- Hardware Design and Verification of a configurable and parametrized 50th order low-pass FIR filter starting from MATLAB Modeling to Veril…☆32Mar 4, 2023Updated 3 years ago
- This project is about building a Clocked Comparator to be used in a 4-bit Flash ADC & minimize the ADC Figure of Merit given by FoM = Pow…☆18Sep 12, 2023Updated 3 years ago
- Open source tools for IC design☆18Aug 4, 2026Updated 3 months ago
- awesome-Analog-IC-Design-Automation☆61Apr 19, 2023Updated 3 years ago
- ☆176Oct 30, 2026Updated last week
- This library is an attempt to make transistor sizing for Analog design less painful.☆30Updated this week
- ☆16May 11, 2022Updated 4 years ago
- Deploy on Railway without the complexity - Free Credits Offer • AdConnect your repo and Railway handles the rest with instant previews. Quickly provision container image services, databases, and storage volumes.
- ☆42Feb 28, 2022Updated 4 years ago
- Design of 4KB Static RAM 1.8V (access time <2.5ns) using OpenRAM and Sky130 node☆17Mar 31, 2021Updated 5 years ago
- ADC Performance Survey (ISSCC & VLSI Circuit Symposium)☆325Aug 1, 2026Updated 3 months ago
- A 10bit SAR ADC in Sky130☆43Dec 4, 2022Updated 3 years ago
- This project shows how to design a clock bootstrapped circuit to improve the nonlinearity of the switch used in Track & Hold circuit. A c…☆13Jul 8, 2019Updated 7 years ago
- A python3 gm/ID starter kit☆101May 22, 2026Updated 5 months ago
- Implementation of a Sub-Sampling PLL targeting SerDes Applications in SKYWATER PDK 130nm process☆10Apr 18, 2024Updated 2 years ago
- This project is about building a high FOM 2.4 GHz LNA for Bluetooth Low-Energy (BLE) Standards, using 45nm CMOS technology.☆18Mar 17, 2019Updated 7 years ago
- An example of analogue design using open source IC design tools☆29Jul 22, 2021Updated 5 years ago
- GPUs on demand by Runpod - Special Offer Available • AdRun AI, ML, and HPC workloads on powerful cloud GPUs—without limits or wasted spend. Deploy GPUs in under a minute and pay by the second.
- Ancillary Material for the book "Systematic Design of Analog CMOS Circuits"☆258Oct 6, 2025Updated last year
- This project produces a clean GDSII Layout with all its details that are used to print photomasks used in the fabrication of a behavioral…☆18Oct 16, 2021Updated 5 years ago
- EE 628: Analysis and Design of Integrated Circuits (University of Hawaiʻi at Mānoa)☆203Aug 8, 2025Updated last year
- Cache-accel: FPGA Accelerated Multi-Core Cache Simulator☆14Mar 12, 2022Updated 4 years ago
- RFIC design course developed at Johannes Kepler University, Department for Integrated Circuits☆57Updated this week
- An open source PDK using TIGFET 10nm devices.☆61Dec 19, 2022Updated 3 years ago
- The VE-HEP RTL and Firmware☆12Mar 19, 2024Updated 2 years ago