666DZY666 / Design-and-Implementation-of-Face-Recognition-based-on-PYNQ
Face recognition, computer vision, deep learning, PYNQ, Movidius NCS
☆59Updated 6 years ago
Alternatives and similar repositories for Design-and-Implementation-of-Face-Recognition-based-on-PYNQ:
Users that are interested in Design-and-Implementation-of-Face-Recognition-based-on-PYNQ are comparing it to the libraries listed below
- 中文:☆97Updated 5 years ago
- hls code zynq 7020 pynq z2 CNN☆84Updated 6 years ago
- ☆45Updated 6 years ago
- At present, just an example to show how to map the detection algorithm YOLOv2 from model to FPGA☆31Updated 6 years ago
- 2019 SEU-Xilinx Summer School☆49Updated 5 years ago
- FPGA-based ZynqNet CNN accelerator developed by Vivado_HLS☆111Updated 7 years ago
- using xilinx xc6slx45 to implement mnist net☆83Updated 6 years ago
- PYNQ学习资料☆163Updated 5 years ago
- First lesson for you to use DNNDK, also it can be helpful for your AI learning☆69Updated last year
- FPGA accelerated TinyYOLO v2 object detection neural network☆71Updated 6 years ago
- The CNN based on the Xilinx Vivado HLS☆37Updated 3 years ago
- Pynq computer vision examples with an OV5640 camera☆46Updated 5 years ago
- A trained Convolutional Neural Network implemented on ZedBoard Zynq-7000 FPGA.☆94Updated last year
- Light-weighted neural network inference for object detection on small-scale FPGA board☆91Updated 5 years ago
- A demo for accelerating sobel in xilinx's fpga pynq☆19Updated 2 years ago
- This course provides professors with an understanding of high-level synthesis design methodologies necessary to develop digital systems u…☆38Updated 5 years ago
- Convolution Neural Network of vgg19 model in verilog☆46Updated 7 years ago
- HLS Project of pp4fpgas - https://github.com/xupsh/pp4fpgas-cn☆235Updated 4 years ago
- FPGA based acceleration of Convolutional Neural Networks. The project is developed by Verilog for Altera DE5 Net platform.☆181Updated 8 years ago
- This TRD is implement DPU v1.4.0 on PYNQ-Z2 board☆44Updated 4 years ago
- ☆19Updated 7 years ago
- ☆39Updated 6 years ago
- This course provides professors with an understanding of high-level synthesis design methodologies necessary to develop digital systems u…☆38Updated 5 years ago
- 基于HLS的高效深度卷积神经网络FPGA实现方法☆69Updated 5 years ago
- it is a set for all the respository of the project.☆96Updated 5 years ago
- Zynq-7000 DPU TRD☆44Updated 5 years ago
- A real time Histogram of Oriented Gradients Implementation on FPGA☆32Updated 6 years ago
- FPGA-based neural network inference project for 2020 DAC System Design Contest☆112Updated 4 years ago
- Deploy CNN accelerator in embedded OS using SDSOC and Xilinx Ultrascale+ ZCU102 platform.☆25Updated 6 years ago
- FPGA Accelerator for CNN using Vivado HLS☆317Updated 3 years ago