Memory-bread / SSD_IN_PYNQLinks
a project build the SSD net in pynq-z2
☆15Updated 5 years ago
Alternatives and similar repositories for SSD_IN_PYNQ
Users that are interested in SSD_IN_PYNQ are comparing it to the libraries listed below
Sorting:
- ☆55Updated 2 years ago
- Vitis AI Lab: MNIST classifier☆19Updated 3 years ago
- Implementation of YOLOv3-tiny + Depthwise Separable Convolution on FPGA☆29Updated 3 years ago
- Codes to implement MobileNet V2 in a FPGA☆27Updated 4 years ago
- Implement Tiny YOLO v3 on ZYNQ☆300Updated 5 months ago
- FPGA☆158Updated last year
- 可运行☆37Updated 3 years ago
- The second place winner for DAC-SDC 2020☆97Updated 3 years ago
- ☆251Updated last year
- Low-Precision YOLO on PYNQ with FINN☆32Updated last year
- HLS_YOLOV3☆25Updated last year
- using xilinx xc6slx45 to implement mnist net☆83Updated 7 years ago
- A simple demo to implement the Handwritten Mathematical Calculator on PYNQ-Z2 FPGA platform by using HLS.☆40Updated 5 years ago
- A DNN Accelerator implemented with RTL.☆67Updated 9 months ago
- This repository contains all the necessary material to implement a YOLOv3 object detection algorithm on the PYNQ-Z2 FPGA. There is a step…☆81Updated 6 months ago
- hls code zynq 7020 pynq z2 CNN☆84Updated 6 years ago
- FPGA实现动态图像识别☆23Updated 5 years ago
- 网络训练、图像预处理以及部分hend功能 是基于pc端实现的,只有主干网络部署在fpga上,片上资源无法支持整个网络所需资源,建议添加外部存储及DDR☆126Updated 2 years ago
- 基于HLS的高效深度卷积神经网络FPGA实现方法☆70Updated 6 years ago
- FPGA-based neural network inference project for 2020 DAC System Design Contest☆115Updated 4 years ago
- ☆26Updated 2 years ago
- 中文:☆103Updated 5 years ago
- ☆32Updated 4 years ago
- 【入门项目】这个仓库是用hls来实现手写数字识别CNN硬件(xilinx fpga)加速的代码☆81Updated 3 years ago
- 【入门项目】基于PYNQ-Z2实现手写数字识别卷积神经网络硬件加速器☆167Updated 2 years ago
- a Real-time image recognition project with RTL accelerator and ZYNQ Architecture☆67Updated last year
- This course provides professors with an understanding of high-level synthesis design methodologies necessary to develop digital systems u…☆37Updated 6 years ago
- A trained Convolutional Neural Network implemented on ZedBoard Zynq-7000 FPGA.☆99Updated last year
- CNN-Accelerator based on FPGA developed by verilog HDL.☆48Updated 5 years ago
- ☆16Updated 3 years ago