Memory-bread / SSD_IN_PYNQLinks
a project build the SSD net in pynq-z2
☆15Updated 4 years ago
Alternatives and similar repositories for SSD_IN_PYNQ
Users that are interested in SSD_IN_PYNQ are comparing it to the libraries listed below
Sorting:
- Codes to implement MobileNet V2 in a FPGA☆25Updated 4 years ago
- Vitis AI Lab: MNIST classifier☆18Updated 2 years ago
- ☆52Updated 2 years ago
- Implementation of YOLOv3-tiny + Depthwise Separable Convolution on FPGA☆28Updated 3 years ago
- ☆26Updated 2 years ago
- The second place winner for DAC-SDC 2020☆97Updated 3 years ago
- This TRD is implement DPU v1.4.0 on PYNQ-Z2 board☆45Updated 4 years ago
- A demo for accelerating sobel in xilinx's fpga pynq☆19Updated 2 years ago
- FPGA-based neural network inference project for 2020 DAC System Design Contest☆113Updated 4 years ago
- hls code zynq 7020 pynq z2 CNN☆85Updated 6 years ago
- CNN-Accelerator based on FPGA developed by verilog HDL.☆47Updated 5 years ago
- A simple demo to implement the Handwritten Mathematical Calculator on PYNQ-Z2 FPGA platform by using HLS.☆40Updated 4 years ago
- HLS_YOLOV3☆26Updated last year
- 2020 xilinx summer school☆17Updated 4 years ago
- ☆16Updated 2 years ago
- 可运行☆34Updated 2 years ago
- 基于HLS的高效深度卷积神经网络FPGA实现方法☆70Updated 5 years ago
- A DNN Accelerator implemented with RTL.☆64Updated 4 months ago
- 中文:☆101Updated 5 years ago
- Low-Precision YOLO on PYNQ with FINN☆31Updated last year
- ☆29Updated 3 years ago
- This repository contains all the necessary material to implement a YOLOv3 object detection algorithm on the PYNQ-Z2 FPGA. There is a step…☆58Updated 2 months ago
- The goal of this design is to use the PYNQ-Z2 development board to design a general convolution neural network accelerator. And through r…☆11Updated 4 years ago
- An AIoT project based on PYNQ-Z2 FPGA Evaluation board. Reading image from usb camera and running yolov3-tiny detection with DPU and usin…☆12Updated 3 years ago
- Some attempts to build CNN on PYNQ.☆24Updated 5 years ago
- A generic Convolutional Neural Network (CNN) Accelerator (CNNA) for FPGA☆24Updated 3 years ago
- using xilinx xc6slx45 to implement mnist net☆83Updated 6 years ago
- Example of Tiny YOLO deployed using Xilinx BNN-PYNQ.☆30Updated 6 years ago
- Training and Implementation of a CNN for image classification with binary weights and activations on FPGA with HLS tools☆51Updated 7 years ago
- ☆11Updated last year