Final Project for Digital Systems Design Course, Fall 2020
☆17Jul 20, 2022Updated 4 years ago
Alternatives and similar repositories for Verilog-Matrix-Multiplier
Users that are interested in Verilog-Matrix-Multiplier are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- Memory Compiler Tutorial☆14Aug 2, 2022Updated 3 years ago
- Implementation of the Snappy compression algorithm as a RoCC accelerator☆12Jul 29, 2019Updated 7 years ago
- 🤦🏻☆13Nov 22, 2018Updated 7 years ago
- Design for 4 x 4 Matrix Multiplication using Verilog☆33Jun 9, 2015Updated 11 years ago
- A SoC for DOOM☆20Apr 11, 2021Updated 5 years ago
- End-to-end encrypted email - Proton Mail • AdSpecial offer: 40% Off Yearly / 80% Off First Month. All Proton services are open source and independently audited for security.
- A simple cycle accurate template model for ASIC/FPGA hardware design. Including a cycle accurate FIFO design example. More designs are co…☆17Sep 5, 2019Updated 6 years ago
- ☆11Mar 14, 2019Updated 7 years ago
- Instruction decoder microbenchmark suite☆11Oct 31, 2017Updated 8 years ago
- ☆24Jun 17, 2014Updated 12 years ago
- Final project for Computer Architecture FA16☆20Jan 5, 2017Updated 9 years ago
- Network on-Chip (NoC) simulator for simulating intra-chip data flow in Neural Network Accelerator☆38Dec 22, 2023Updated 2 years ago
- list of links to resources related to functional verification☆12Sep 10, 2023Updated 2 years ago
- CNN accelerator using NoC architecture☆18Dec 6, 2018Updated 7 years ago
- Tiny matrix multiplication ASIC with 4-bit math☆12Apr 19, 2024Updated 2 years ago
- Managed Kubernetes at scale on DigitalOcean • AdDigitalOcean Kubernetes includes the control plane, bandwidth allowance, container registry, automatic updates, and more for free.
- Digital IC design and vlsi notes☆15Jun 24, 2020Updated 6 years ago
- django package for integrating payments with zarrinpal☆12Feb 15, 2021Updated 5 years ago
- Verilog Sigmoid and Tanh functions which can be configured and added to your neural network project☆16Mar 9, 2020Updated 6 years ago
- This is a verilog implementation of 4x4 systolic array multiplier☆86Nov 2, 2020Updated 5 years ago
- Highly accurate counter for measuring elapsed time in Python☆15Oct 28, 2019Updated 6 years ago
- Customize skyroom theme☆20Nov 2, 2021Updated 4 years ago
- The 3rd Iteration of the Berkeley RISC-V DMA Accelerator☆28Nov 21, 2019Updated 6 years ago
- ☆15Nov 19, 2022Updated 3 years ago
- Probabilistic robotic algorithms☆10Feb 5, 2022Updated 4 years ago
- Bare Metal GPUs on DigitalOcean Gradient AI • AdPurpose-built for serious AI teams training foundational models, running large-scale inference, and pushing the boundaries of what's possible.
- RiVer Core is an open source Python based RISC-V Core Verification framework.☆23Jun 16, 2025Updated last year
- Repository for compilation and cycle-accurate simulator for scale-out systolic arrays☆16Jan 4, 2023Updated 3 years ago
- The open- MSP430 is an open-source 16-bit microcontroller core written in Verilog, that is compatible with the Texas Instruments MSP430 m…☆18Jan 28, 2022Updated 4 years ago
- User Space NVMe Driver (modified for use on Zynq UltraScale+ MPSoC)☆11Sep 26, 2018Updated 7 years ago
- IPv4/UDP stack written in VHDL code, for interfacing with an FPGA over Ethernet☆11Jun 2, 2021Updated 5 years ago
- CNN on Artix-7 FPGA to perform pattern detection from a pool of objects☆12Sep 12, 2018Updated 7 years ago
- Userspace I/O library for Xilinx AXI S2MM DMA☆12Sep 9, 2025Updated 10 months ago
- Xilinx IP repository☆13May 5, 2018Updated 8 years ago
- A middleware for FastAPI that allows you to create mock endpoints quickly and easily.☆17Apr 24, 2025Updated last year
- End-to-end encrypted email - Proton Mail • AdSpecial offer: 40% Off Yearly / 80% Off First Month. All Proton services are open source and independently audited for security.
- DDR4 Simulation Project in System Verilog☆47Aug 18, 2014Updated 11 years ago
- The official implementation of "SVG-Net: An SVG-based Trajectory Prediction Model"☆17Apr 8, 2022Updated 4 years ago
- [Script and Docker 🐳] OpenConnect (Cisco AnyConnect) VPN Server (OCServ) script one key easy configurator and installer☆14May 18, 2023Updated 3 years ago
- Modular Verilog PCIexpress Interface Components with complete MyHDL Testbench for FPGA deployment☆14Sep 17, 2019Updated 6 years ago
- This project is about energy efficiency and renewable energy topic. Developed multivariate time series model to forecast global warming. …☆10Sep 29, 2020Updated 5 years ago
- This project aims to develop a novel neuromorphic NoC architecture based on RISC-V ISA to support spiking neural network applications, an…☆22Nov 27, 2025Updated 8 months ago
- Material for the machine vision course☆12Jan 3, 2023Updated 3 years ago