githubofaliyev / SNN-DSELinks
Hardware and software implementation of Sparsely-active SNNs
☆20Updated 10 months ago
Alternatives and similar repositories for SNN-DSE
Users that are interested in SNN-DSE are comparing it to the libraries listed below
Sorting:
- ☆20Updated 4 years ago
- SNN on FPGA☆11Updated 3 years ago
- The CyNAPSE Neuromorphic Accelerator: A Digital Spiking neural network accelerator written in fully synthesizable verilog HDL☆36Updated 6 years ago
- This is the RTL implementation of Shenjing, a low power neuromorphic computing accelerator☆17Updated 5 years ago
- FPGA implement of 8x8 weight stationary systolic array DNN accelerator☆16Updated 4 years ago
- A Custom RISC-V Instruction Extension for SNN and CNN Computation☆25Updated last year
- Hardware implementation of Spiking Neural Network on a PYNQ-Z1 board☆38Updated 6 years ago
- This project is to design yolo AI accelerator in verilog HDL.☆28Updated last year
- Framework for radix encoded SNN on FPGA☆16Updated 3 years ago
- An open source Verilog Based LeNet-1 Parallel CNNs Accelerator for FPGAs in Vivado 2017☆19Updated 6 years ago
- HedgeHog Fused Spiking Neural Network Emulator/Compute Engine is a hardware implementation of a SNN designed for implementation in Xilinx…☆60Updated 8 months ago
- This is my hobby project with System Verilog to accelerate LeViT Network which contain CNN and Attention layer.☆25Updated last year
- Hardware accelerator for convolutional neural networks☆60Updated 3 years ago
- ☆17Updated 4 years ago
- Tensor Processing Unit implementation in Verilog☆10Updated 8 months ago
- ☆18Updated last year
- This project aims to develop a novel neuromorphic NoC architecture based on RISC-V ISA to support spiking neural network applications, an…☆21Updated 2 years ago
- Benchmark framework of compute-in-memory based accelerators for deep neural network (on-chip training chip focused)☆54Updated 4 years ago
- tpu-systolic-array-weight-stationary☆25Updated 4 years ago
- [FPL 2021] SyncNN: Evaluating and Accelerating Spiking Neural Networks on FPGAs.☆62Updated 4 years ago
- SATA_Sim is an energy estimation framework for Backpropagation-Through-Time (BPTT) based Spiking Neural Networks (SNNs) training and infe…☆28Updated last year
- A nest brain simulator based on FPGA(LIF NEURON)☆14Updated 3 years ago
- Spiking Neural Network RTL Implementation☆62Updated 4 years ago
- The official implementation of HPCA 2025 paper, Prosperity: Accelerating Spiking Neural Networks via Product Sparsity☆36Updated 3 months ago
- I will share some useful or interesting papers about neuromorphic processor☆28Updated 9 months ago
- bitfusion verilog implementation☆12Updated 3 years ago
- A three-layer LIF neuron SNN accelerator. The first layer is the input layer and has 784 neurons, that receive the encoded spikes. The se…☆14Updated 2 years ago
- tinyODIN digital spiking neural network (SNN) processor - HDL source code and documentation.☆74Updated 2 years ago
- Efficient single-pass hyperdimensional classifier. Mirror of https://gitlab.com/biaslab/onlinehd☆10Updated 4 years ago
- The project includes SRAM In Memory Computing Accelerator with updates in design/circuits submitted previously in MPW7, by IITD researche…☆16Updated 2 years ago