jiegec / maze-routing

Related projects ⓘ

Alternatives and complementary repositories for maze-routing

• circt / arc-tests
  A collection of tests and benchmarks for the Arc simulation backend of CIRCT
  ☆25Updated last week
• jiegec / chisel-memory-lower
  Lower chisel memories to SRAM macros
  ☆10Updated 7 months ago
• jiegec / verilog-lang
  A hand-written recursive decent Verilog parser.
  ☆11Updated 2 years ago
• vegaluisjose / vast
  Verilog AST
  ☆19Updated 11 months ago
• jiegec / cpu
  Microarchitecture diagrams of several CPUs
  ☆17Updated this week
• CircuitCoder / mill
  RV32I by cats
  ☆17Updated last year
• jiegec / fpu-wrappers
  Wrappers for open source FPU hardware implementations.
  ☆31Updated 7 months ago
• StanfordAHA / lassen
  The PE for the second generation CGRA (garnet).
  ☆16Updated 2 months ago
• jiegec / rvv-kernels
  Implements kernels with RISC-V Vector
  ☆21Updated last year
• CircuitCoder / ChannelOS
  What if everything is a io_uring?
  ☆16Updated 2 years ago
• riscv / riscv-bfloat16
  ☆30Updated 4 months ago
• cgfandia / PathfinderAlgorithm
  Pathfinder routing algorithm practice
  ☆12Updated 7 years ago
• daitoto / EDA-wiki
  EDA wiki
  ☆50Updated last year
• ekiwi / wellen
  wellen: waveform datastructures in Rust. Fast VCD, FST and GHW parsing for waveform viewers.
  ☆41Updated last week
• meow-chip / MeowV64
  A superscalar RISC-V CPU with out-of-order execution and multi-core support
  ☆55Updated 2 years ago
• AUCOHL / OGRE
  Global Router Built for ICCAD Contest 2019
  ☆30Updated 4 years ago
• OpenXiangShan / YunSuan
  This repo includes XiangShan's function units
  ☆15Updated 2 weeks ago
• chipsalliance / rocket-chip-blocks
  RTL blocks compatible with the Rocket Chip Generator
  ☆14Updated 4 months ago
• chipsalliance / chisel-interface
  The 'missing header' for Chisel
  ☆16Updated last month
• The-OpenROAD-Project-Attic / FastRoute
  LEF/DEF-based port of Iowa State's open-source FastRoute 4.1
  ☆52Updated 4 years ago
• The-OpenROAD-Project / SA-PCB
  Annealing-based PCB placement tool
  ☆32Updated 4 years ago
• limbo018 / OpenMPL
  An open multiple patterning framework
  ☆70Updated 6 months ago
• Daikon-Sun / Routing-Visualization
  Routing Visualization for Physical Design
  ☆18Updated 5 years ago
• asyncvlsi / SPRoute
  A parallel global router using the Galois framework
  ☆25Updated last year
• jiegec / rocket-chip-vcu128
  Run Rocket Chip on VCU128
  ☆27Updated this week
• luckyrantanplan / nthu-route
  VLSI EDA Global Router
  ☆69Updated 6 years ago
• mikeurbach / egg-netlist-synthesizer
  Using e-graphs to synthesize netlists from boolean logic.
  ☆14Updated last year
• CTSRD-CHERI / SIMTight
  Synthesisable SIMT-style RISC-V GPGPU
  ☆28Updated last week
• dramforever / ixayoi
  (WIP) A relatively simple pipelined RISC-V core, written in Bluespec SystemVerilog
  ☆12Updated 3 years ago
• The-OpenROAD-Project-Attic / ioPlacer
  IO and Pin Placer for Floorplan-Placement Subflow
  ☆23Updated 4 years ago