bkoppelmann / lefdef-toolkitLinks
Source code for LEF/DEF
☆11Updated 6 years ago
Alternatives and similar repositories for lefdef-toolkit
Users that are interested in lefdef-toolkit are comparing it to the libraries listed below
Sorting:
- Python iterface for Cadence LEF/DEF parser.☆22Updated last year
- BoxRouter2.0 is a new global router for ultimate routability. It is inspired by BoxRouter [1], but can perform multi-layer routing with 2…☆21Updated 6 years ago
- A Fast C++ Header-only Parser for Standard Parasitic Exchange Format (SPEF).☆56Updated 3 years ago
- CUGR, VLSI Global Routing Tool Developed by CUHK☆138Updated 2 years ago
- Library for VLSI CAD Design Useful parsers and solvers' api are implemented.☆178Updated 4 months ago
- ☆87Updated last week
- Bounded-Skew DME v1.3☆14Updated 7 years ago
- Rsyn – An Extensible Physical Synthesis Framework☆132Updated last year
- A Standalone Structural Verilog Parser☆97Updated 3 years ago
- ☆47Updated last year
- ☆25Updated 4 years ago
- Database and Tool Framework for EDA☆118Updated 4 years ago
- liberty parser (For parsing IC timing lib file)☆65Updated 2 years ago
- A LEF/DEF Utility.☆32Updated 6 years ago
- Open Source Detailed Placement engine☆39Updated 5 years ago
- Intel's Analog Detailed Router☆39Updated 6 years ago
- UCSD Detailed Router☆90Updated 4 years ago
- GDSII File Parsing, IC Layout Analysis, and Parameter Extraction☆125Updated 2 years ago
- LEF/DEF-based port of Iowa State's open-source FastRoute 4.1☆58Updated 5 years ago
- reference block design for the ASAP7nm library in Cadence Innovus☆51Updated last year
- VLSI EDA Global Router☆75Updated 7 years ago
- ☆34Updated 4 years ago
- Global Router Built for ICCAD Contest 2019☆33Updated 5 years ago
- AIB Generator: Analog hardware compiler for AIB PHY☆34Updated 5 years ago
- Mirror of Synopsys's Liberty parser library☆24Updated 7 years ago
- A collection of ISCAS,ITC,TAU and other Benchmark Circuits for EDA tool evaluation.☆57Updated 8 months ago
- Material for OpenROAD Tutorial at DAC 2020☆47Updated 2 years ago
- AMF-Placer 2.0: An open-source timing-driven analytical mixed-size FPGA placer of heterogeneous resources (LUT/FF/LUTRAM/MUX/CARRY/DSP/BR…☆105Updated last year
- Machine Generated Analog IC Layout☆254Updated last year
- Delay Calculation ToolKit☆32Updated 3 years ago