hxfycy / 1024-point-fftLinks
Radix-4 1024 point fft in verilog
☆13Updated 5 years ago
Alternatives and similar repositories for 1024-point-fft
Users that are interested in 1024-point-fft are comparing it to the libraries listed below
Sorting:
- Based on ARM AMBA bus protocol, Verilog is used to design the digital circuit.☆133Updated 4 years ago
- AMBA v.3 APB v.1 Specification Complaint Slave SRAM Core design and testbench. The testbench is developed using System Verilog and UVM an…☆186Updated 7 years ago
- AMBA bus lecture material☆482Updated 5 years ago
- 数字IC秋招项目、手撕代码☆39Updated last year
- AMBA bus generator including AXI4, AXI3, AHB, and APB☆225Updated 2 years ago
- yet another AXI testbench repo. ;) This is for my UVM practice. https://marcoz001.github.io/axi-uvm/☆131Updated 8 years ago
- AXI DMA 32 / 64 bits☆122Updated 11 years ago
- uvm AXI BFM(bus functional model)☆263Updated 12 years ago
- Awesome ASIC design verification☆333Updated 3 years ago
- ☆19Updated 5 years ago
- AMBA AXI VIP☆430Updated last year
- AXI总线连接器☆105Updated 5 years ago
- System Verilog based Verification of MIPS 5 staged pipelined processor using UVM environment☆113Updated 11 months ago
- This is the main repository for all the examples for the book Practical UVM☆210Updated 5 years ago
- this repository is vim cfg for verilog.☆52Updated last year
- Reference examples and short projects using UVM Methodology☆283Updated 3 years ago
- SystemVerilog-based UVM testbench for an Ethernet 10GE MAC core☆151Updated 7 years ago
- UVM AHB VIP☆87Updated 2 months ago
- UVM examples and projects☆149Updated 5 months ago
- AMBA AHB 2.0 VIP in SystemVerilog UVM☆156Updated 5 years ago
- VIP for AXI Protocol☆158Updated 3 years ago
- An uvm verification env for ahb2apb bridge☆56Updated 4 years ago
- 我的数字IC厂库:Verilog HDL; System Vreilog; UVM; ModelSim; Quartus II;☆105Updated 3 years ago
- A Framework for Design and Verification of Image Processing Applications using UVM☆113Updated 8 years ago
- ☆72Updated 9 years ago
- IC Verification & SV Demo☆54Updated 4 years ago
- Maven Silicon project - AHB-to-APB Bridge Verification using UVM Methodology.☆102Updated 2 years ago
- A dual clock asynchronous FIFO written in verilog, tested with Icarus Verilog☆392Updated 2 months ago
- A 16-bit by 16-bit signed binary multiplier based on the Radix-4 Booth algorithm and Wallace Tree reduction☆63Updated last year
- Real time face detection based on Arm Cortex-M3 DesignStart and FPGA☆209Updated 2 years ago