Synthesizeable VHDL and Verilog implementation of 64-point FFT/IFFT Processor with Q4.12 Fixed Point Data Format.
☆36May 20, 2020Updated 6 years ago
Alternatives and similar repositories for 64pointFFTProcessor
Users that are interested in 64pointFFTProcessor are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- Turbo coder and decoder☆12Oct 11, 2023Updated 2 years ago
- A simple tool to demonstrate the physical design steps of VLSI Design Flow.☆11Dec 13, 2020Updated 5 years ago
- A 32 point radix-2 FFT module written in Verilog☆25Jun 28, 2020Updated 6 years ago
- A 16-point radix-4 FFT chip, including Verilog codes, netlists and layout. Group project.☆77Mar 16, 2026Updated 5 months ago
- Verilog code for a circuit implementation of Radix-2 FFT☆28Dec 5, 2021Updated 4 years ago
- Bare Metal GPUs on DigitalOcean Gradient AI • AdPurpose-built for serious AI teams training foundational models, running large-scale inference, and pushing the boundaries of what's possible.
- Spectrum analyzer system using a 512-point FFT, in a Cyclone IV FPGA. Reads i2s audio from the codec and then does all FFT/VGA functions.…☆32Feb 9, 2018Updated 8 years ago
- FFT implementation using CORDIC algorithm written in Verilog.☆36Sep 6, 2018Updated 7 years ago
- TCP/IP and UDP/IP protocol stack off-loading☆19Aug 9, 2020Updated 6 years ago
- Nuclei AI Library Optimized For RISC-V Vector☆15Oct 15, 2025Updated 10 months ago
- Reference implementation of GFDM framework☆16Jun 14, 2018Updated 8 years ago
- Dadda multiplier(8*8, 16*16, 32*32) in Verilog HDL.☆44Jun 6, 2024Updated 2 years ago
- This is the repository containing the implementation of sparse dense matrix multiplication for the matrix dimension of 560 x 560.☆10Jul 7, 2021Updated 5 years ago
- This project aims to implement a full SDRAM controller for Altera DE2-115 FPGA☆14Nov 24, 2014Updated 11 years ago
- FFT implement by verilog_测试验证已通过☆62Sep 14, 2016Updated 9 years ago
- Managed Database hosting by DigitalOcean • AdPostgreSQL, MySQL, MongoDB, Kafka, Valkey, and OpenSearch available. Automatically scale up storage and focus on building your apps.
- Example of RISC-V Vector programming☆31Jul 14, 2026Updated last month
- Post-synthesis power optimization via dual-Vth cell assignment and gate re-sizing. Scripting in TCL with custom commands written for Syno…☆14Jun 9, 2021Updated 5 years ago
- ASIC Design of the openSPARC Floating Point Unit☆17Mar 13, 2017Updated 9 years ago
- Open Source tool to build liberty files and for Characterizing Standard Cells.☆29Feb 18, 2021Updated 5 years ago
- ☆20Nov 14, 2022Updated 3 years ago
- CUDA optimized Path Tracer☆10Dec 23, 2018Updated 7 years ago
- IEEE Executive project for the year 2021-2022☆12Nov 22, 2022Updated 3 years ago
- Example Risc-V SoC with VexRiscv, custom peripherals and bare metal firmware☆13Aug 24, 2020Updated 6 years ago
- Verilog and matlab implementation of tanh using Cordic algorithm☆11Jun 5, 2020Updated 6 years ago
- Deploy on Railway without the complexity - Free Credits Offer • AdConnect your repo and Railway handles the rest with instant previews. Quickly provision container image services, databases, and storage volumes.
- Demo SoC☆10Oct 17, 2023Updated 2 years ago
- Osmocom DSP utility function library; mirrored from https://gitea.osmocom.org/sdr/libosmo-dsp☆14Jun 24, 2025Updated last year
- This project presents a 10Gb/s transceiver design using 65nm CMOS process, based on a 10GBASE-KR standard.☆34Feb 21, 2019Updated 7 years ago
- FIR，FFT based on Verilog☆14Dec 3, 2017Updated 8 years ago
- Design consists of a 32-bit MIPS superscalar pipeline processor in functional Verilog. Runs a cache based memory system, a branch predict…☆15Oct 9, 2017Updated 8 years ago
- The ResNet18 and RepVGG model was used for 72 metal oxide gas sensor datasets for 10 gases.☆13Apr 5, 2024Updated 2 years ago
- Hardware Implementation of Sigmoid Function using verilog HDL☆16Dec 16, 2019Updated 6 years ago
- 基于FPGA的FFT☆19Feb 18, 2019Updated 7 years ago
- Multi Layer Perceptron by Vivado HLS for Xilinx FPGA implementation☆12Dec 26, 2016Updated 9 years ago
- GPU virtual machines on DigitalOcean Gradient AI • AdGet to production fast with high-performance AMD and NVIDIA GPUs you can spin up in seconds. The definition of operational simplicity.
- Incremental Timing-Driven Placement, problem C of ICCAD contest 2015☆16Sep 28, 2017Updated 8 years ago
- A Convolutional Neural Network (CNN) hardware accelerator for image recognition☆16Jul 14, 2019Updated 7 years ago
- Simple Path Tracer on an FPGA☆34Aug 29, 2021Updated 5 years ago
- Hardware-accelerated sorting algorithm☆16May 4, 2020Updated 6 years ago
- TensorCore Vector Processor for Deep Learning - Google Summer of Code Project☆27Aug 23, 2021Updated 5 years ago
- Real-time Audio Processing through FIR filters on Basys-3 FPGA and Pmod I2S2☆18Feb 1, 2023Updated 3 years ago
- An up5k board to manage pulse-echo ultrasound acquisition.☆42Jul 16, 2024Updated 2 years ago