A Claude Code plugin for process management from requirement sorting to delivery
☆29Jun 4, 2026Updated 3 months ago
Alternatives and similar repositories for fnw
Users that are interested in fnw are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- "Middleware" (infrastructure) for host-FPGA applications (e.g., accelerators)☆20Sep 26, 2024Updated 2 years ago
- Amazon F1-inspired Xilinx VCU118 hardware design framework☆14Jan 4, 2021Updated 5 years ago
- ☆16Dec 4, 2021Updated 4 years ago
- I am developing a set of general-purpose shareable data structures for C# and Java all of whose fields are public readonly/final, and use…☆11Sep 20, 2026Updated last week
- This repository contains tutorial code and supplementary note for point cloud processing.☆12Jun 21, 2026Updated 3 months ago
- 1-Click AI Models by DigitalOcean Gradient • AdDeploy popular AI models on DigitalOcean Gradient GPU virtual machines with just a single click. Zero configuration with optimized deployments.
- Programmatically control ROS Bag files.☆13Sep 5, 2017Updated 9 years ago
- - Use FPGA to implement MIPI interface; - Get command from PC through USB communication; - Decode command in FPGA☆13Jul 18, 2017Updated 9 years ago
- Official PyTorch Code for "Dynamic Temperature Knowledge Distillation"☆11Mar 28, 2025Updated last year
- Polar Decoder☆12Jan 19, 2023Updated 3 years ago
- ☆11Nov 30, 2022Updated 3 years ago
- 黃鐘揚老師的"系統晶片驗證"作業與專題(SoCV)☆11Jan 18, 2024Updated 2 years ago
- HLS implemented systolic array structure☆41Nov 13, 2017Updated 8 years ago
- ☆19Jul 25, 2018Updated 8 years ago
- 基于玄铁openc906,搭建最小化SoC系统☆21Apr 7, 2025Updated last year
- GPU virtual machines on DigitalOcean Gradient AI • AdGet to production fast with high-performance AMD and NVIDIA GPUs you can spin up in seconds. The definition of operational simplicity.
- Network on Chip for MPSoC☆30Aug 7, 2026Updated last month
- Convert AEDAT4 files from DV into AEDAT-2.0 files for jAER☆10Feb 23, 2024Updated 2 years ago
- Open-source, evidence-driven MCP server for RTL simulation debugging: correlate VCS/Xcelium logs, VCD/FSDB waveforms, SystemVerilog/UVM s…☆118Sep 25, 2026Updated last week
- VeriFlow-CC: A Claude Code-driven RTL design pipeline. Automates Chip-on-Chat from architecture to synthesis (iVerilog/Yosys) using a sta…☆51Aug 3, 2026Updated 2 months ago
- A SystemC + DRAMSim2 simulator for exploring the SpMV hardware accelerator design space.☆15Nov 9, 2014Updated 11 years ago
- SDIO Device Verilog Core☆25Jul 25, 2018Updated 8 years ago
- Hardware Accelerators on FPGA for Computer Vision Applications☆16Dec 16, 2025Updated 9 months ago
- SystemVerilog Development Environment☆53Aug 30, 2026Updated last month
- ☆19Aug 3, 2026Updated 2 months ago
- Deploy on Railway without the complexity - Free Credits Offer • AdConnect your repo and Railway handles the rest with instant previews. Quickly provision container image services, databases, and storage volumes.
- 物件導向-戴文凱☆12Jun 1, 2021Updated 5 years ago
- A repository for academic works on RTL generation and Analog circuit generation based on LLM☆39Updated this week
- ☆10May 25, 2021Updated 5 years ago
- Implementation of RISC-V RV32IM. Simple in-order 3-stage pipeline. Low resources (e.g., FPGA softcore).☆36Jul 10, 2016Updated 10 years ago
- ☆23Mar 9, 2026Updated 6 months ago
- Board: PYNQ-Z2, Vitis version: 2022.1☆21Sep 2, 2024Updated 2 years ago
- 浙江大学课程攻略共享计划☆12Jul 23, 2021Updated 5 years ago
- The official project website of "Small Scale Data-Free Knowledge Distillation" (SSD-KD for short, published in CVPR 2024).☆22Jun 13, 2024Updated 2 years ago
- Code for ICML 2023 paper "Quantifying the Knowledge in GNNs for Reliable Distillation into MLPs"☆22Sep 24, 2025Updated last year
- Managed hosting for WordPress and PHP on Cloudways • AdManaged hosting for WordPress, Magento, Laravel, or PHP apps, on multiple cloud providers. Deploy in minutes on Cloudways by DigitalOcean.
- Flute 3.1 with CMake support☆16Jul 25, 2019Updated 7 years ago
- USB Type-C Power Delivery FPGA☆34Apr 24, 2026Updated 5 months ago
- ☆37Nov 11, 2018Updated 7 years ago
- 支持AXI总线协议的8k×8 SP SRAM☆28Mar 26, 2020Updated 6 years ago
- Step by step tutorial for building CortexM0 SoC☆42Mar 29, 2022Updated 4 years ago
- Integrated Circuit Design Contest (ICDC) - 大學院校積體電路設計競賽☆25Apr 20, 2022Updated 4 years ago
- SDK for CeleX4 sensor.☆15Dec 12, 2019Updated 6 years ago