vinamarora8 / Radix-2-FFTView external linksLinks
Verilog code for a circuit implementation of Radix-2 FFT
☆27Dec 5, 2021Updated 4 years ago
Alternatives and similar repositories for Radix-2-FFT
Users that are interested in Radix-2-FFT are comparing it to the libraries listed below
Sorting:
- Verilog module for calculation of FFT.☆192Aug 22, 2012Updated 13 years ago
- A 16-point radix-4 FFT chip, including Verilog codes, netlists and layout. Group project.☆72Aug 17, 2024Updated last year
- Radix-4 1024 point fft in verilog☆13Apr 29, 2020Updated 5 years ago
- FFT implement by verilog_测试验证已通过☆61Sep 14, 2016Updated 9 years ago
- R2FFT is a fully synthesizable verilog module for doing the FFT on an FPGA or ASIC.☆22Apr 30, 2019Updated 6 years ago
- ☆20Feb 9, 2020Updated 6 years ago
- FFT implementation using CORDIC algorithm written in Verilog.☆34Sep 6, 2018Updated 7 years ago
- Pipelined FFT/IFFT 256 points processor☆10Jul 17, 2014Updated 11 years ago
- Synthesizeable VHDL and Verilog implementation of 64-point FFT/IFFT Processor with Q4.12 Fixed Point Data Format.☆34May 20, 2020Updated 5 years ago
- A MIPS CPU with dual-issue, out-of-order, and 5-stage pipelines☆11Nov 28, 2019Updated 6 years ago
- Verilog Implementation of the Number Theoretic Transform (NTT) and its inverse operation (INTT) utilizing modulo arithmetic for lattice-b…☆15Nov 18, 2025Updated 2 months ago
- Alpha64 R10000 Two-Way Superscalar Processor☆11May 6, 2019Updated 6 years ago
- ☆13Sep 29, 2024Updated last year
- Convert AEDAT4 files from DV into AEDAT-2.0 files for jAER☆10Feb 23, 2024Updated last year
- Disaster management ecosystem to locate victims and co-ordinate operations☆10Nov 30, 2019Updated 6 years ago
- Some simple attempts at building GeNN models☆10Oct 10, 2025Updated 4 months ago
- Benchmarking execution time of AlexNet CNN on FPGA and GPU. Developed AlexNet in opencl.☆11Oct 9, 2019Updated 6 years ago
- GNU toolchain for PULP and RISC-V☆13Mar 15, 2025Updated 11 months ago
- 1U CubeSat engineering model solar panels hardware project.☆12Dec 19, 2020Updated 5 years ago
- Alaska Research CubeSat Attitude Control and Determination System flight code☆10Jan 6, 2017Updated 9 years ago
- Developed an algorithm for Attitude Determination and control of a 1DOF 1U Cubesat.☆13Jul 25, 2021Updated 4 years ago
- ☆10Dec 5, 2017Updated 8 years ago
- FFT algorithm coded in Verilog. Designed to run on a Xillinx Spartan 6 FPGA board.☆14Jul 19, 2012Updated 13 years ago
- I present a novel pipelined fast Fourier transform (FFT) architecture which is capable of producing the output sequence in normal order. …☆48Dec 3, 2023Updated 2 years ago
- Open Flashloader for DLink and OpenOCD☆14May 13, 2025Updated 9 months ago
- Our recruitment page☆13Mar 31, 2022Updated 3 years ago
- AxLS: An Open-Source Framework for Netlist Transformation Approximate Logic Synthesis☆13Sep 14, 2025Updated 5 months ago
- Clash 和 sing-box 教程合集——安装、配置、自定义规则、DNS 分流☆11Nov 24, 2025Updated 2 months ago
- Programmatically control ROS Bag files.☆13Sep 5, 2017Updated 8 years ago
- Little RISC-V 3-stage Pipeline CPU☆16Jun 14, 2021Updated 4 years ago
- Vim plugin to get scores and commentary of live cricket matches☆12Jun 13, 2019Updated 6 years ago
- Extended and external tests for Verilator testing☆17Jan 25, 2026Updated 2 weeks ago
- This project aims to design an 32-point FFT (Fast Fourier Transform) based DIT (decimation in time) Butterfly Algorithm with multiple clo…☆61Jul 21, 2023Updated 2 years ago
- A Convolutional Neural Network (CNN) hardware accelerator for image recognition☆14Jul 14, 2019Updated 6 years ago
- Progred's programming contest platform written in PHP☆12Jul 6, 2016Updated 9 years ago
- Digital Design Lab Spring 2019 Final Project☆13Jun 17, 2019Updated 6 years ago
- ☆12Sep 20, 2016Updated 9 years ago
- RiscSoC 是一个芯片集成项目，包含了 Cortex-M0、Cortex-M3、MIPS、RISC-V、4-BIT 等内核的 SoC 集成，部分 SoC 使用的自己设计的内核☆12Apr 26, 2022Updated 3 years ago
- ☆13Jan 3, 2026Updated last month