Istzqy / CIC-FilterLinks
关于CIC滤波器、ISOP补偿器、HB滤波器的相关Matlab仿真与FPGA工程
☆12Updated last year
Alternatives and similar repositories for CIC-Filter
Users that are interested in CIC-Filter are comparing it to the libraries listed below
Sorting:
- FFT implement by verilog_测试验证已通过☆58Updated 8 years ago
- I2C Master and Slave☆38Updated 10 years ago
- practice configure AHB-Lite bus protocol☆14Updated 6 years ago
- ☆73Updated 4 years ago
- An uvm verification env for ahb2apb bridge☆54Updated 4 years ago
- 视频旋转（2019FPGA大赛）☆35Updated 5 years ago
- Based on ARM AMBA bus protocol, Verilog is used to design the digital circuit.☆130Updated 4 years ago
- An FPGA-based DDR1 controller. 基于FPGA的DDR1控制器，为低端FPGA嵌入式系统提供廉价、大容量的存储。☆187Updated last year
- asynchronous FIFO that support Non-symmetric aspect ratios(different read and write data widths), First-Word Fall-Through and data counte…☆21Updated last year
- AXI总线连接器☆103Updated 5 years ago
- This repo includes 3 independent modules: UART receiver, UART transmitter, UART to AXI4 master. 本项目包含3个独立模块：UART接收器、UART发送器、UART转AXI4交互式调…☆248Updated last year
- Vivado诸多IP，包括图像处理等☆226Updated last year
- ARM中通过APB总线连接的UART模块☆67Updated 5 years ago
- AMBA bus generator including AXI4, AXI3, AHB, and APB☆217Updated 2 years ago
- AMBA v.3 APB v.1 Specification Complaint Slave SRAM Core design and testbench. The testbench is developed using System Verilog and UVM an…☆178Updated 7 years ago
- Must-have verilog systemverilog modules☆37Updated 3 years ago
- A Framework for Design and Verification of Image Processing Applications using UVM☆106Updated 7 years ago
- Step by step tutorial for building CortexM0 SoC☆38Updated 3 years ago
- Verilog implementation of fixed-point numbers, supports custom bit width, arithmetic, converting to float, with single cycle & pipeline v…☆203Updated last year
- SystemVerilog-based UVM testbench for an Ethernet 10GE MAC core☆147Updated 7 years ago
- Cortex M0 based SoC☆74Updated 3 years ago
- AXI DMA 32 / 64 bits☆120Updated 11 years ago
- This is the main repository for all the examples for the book Practical UVM☆201Updated 4 years ago
- Radix-4 1024 point fft in verilog☆10Updated 5 years ago
- PCIE 5.0 Graduation project (Verification Team)☆79Updated last year
- 数字IC秋招项目、手撕代码☆37Updated last year
- SPI interface connect to APB BUS with Verilog HDL☆36Updated 4 years ago
- 本项目为2023年全国大学生嵌入式芯片与系统设计竞赛——FPGA创新设计竞赛（高云赛道）项目，题目基于高云FPGA的多路网络视频监控编码系统。☆51Updated last year
- Attempt to setup a bridge between AHB and I2C by constructing dedicated modules of AHB master , AHB slave , APB master , APB slave, I2C m…☆22Updated 6 years ago
- 基于FPGA的三速以太网UDP协议栈设计☆29Updated last year