view at https://xupsh.github.io/ccc2021/
☆23Apr 16, 2022Updated 3 years ago
Alternatives and similar repositories for ccc2021
Users that are interested in ccc2021 are comparing it to the libraries listed below
Sorting:
- Accelerating SSSP for power-law graphs using an FPGA.☆23Mar 29, 2022Updated 3 years ago
- An MLIR-based compiler from C/C++ to AMD-Xilinx Versal AIE☆17Aug 5, 2022Updated 3 years ago
- 2021 Xilinx China Winter Camp☆11Mar 12, 2021Updated 4 years ago
- ☆19Dec 3, 2019Updated 6 years ago
- Hybrid BFS on Xilinx Zynq☆18Jun 9, 2015Updated 10 years ago
- ☆24Dec 3, 2021Updated 4 years ago
- Chisel implementation of AES☆24Mar 27, 2020Updated 5 years ago
- DAC System Design Contest 2020☆29Jun 11, 2020Updated 5 years ago
- Processing in Memory Emulation☆23Feb 24, 2023Updated 3 years ago
- ACM TODAES Best Paper Award, 2022☆32Oct 24, 2023Updated 2 years ago
- Automatic generation of FPGA-based learning accelerators for the neural network family☆68Dec 26, 2019Updated 6 years ago
- Convolutional Channel-wise Competitive Learning for the Forward-Forward Algorithm. AAAI 2024☆12Jun 27, 2024Updated last year
- Rapidly deploy Chisel and Vivado HLS accelerators on Xilinx PYNQ☆34Sep 19, 2018Updated 7 years ago
- This course provides professors with an understanding of high-level synthesis design methodologies necessary to develop digital systems u…☆69Apr 18, 2019Updated 6 years ago
- ☆34Jun 7, 2021Updated 4 years ago
- sram/rram/mram.. compiler☆47Sep 11, 2023Updated 2 years ago
- HLS-based Graph Processing Framework on FPGAs☆149Oct 11, 2022Updated 3 years ago
- ☆37Jun 1, 2022Updated 3 years ago
- Arche is a Greek word with primary senses "beginning". The repository defines a framework for technology mapping of emerging technologies…☆11May 15, 2020Updated 5 years ago
- [FCCM 2023] PASTA: Programming and Automation Support for Scalable Task-Parallel HLS Programs on Modern Multi-Die FPGAs☆14Jun 26, 2025Updated 8 months ago
- This course provides professors with an understanding of high-level synthesis design methodologies necessary to develop digital systems u…☆39Nov 25, 2019Updated 6 years ago
- An efficient storage system for concurrent graph processing☆10Feb 1, 2021Updated 5 years ago
- ☆13Dec 17, 2025Updated 2 months ago
- This is the Google/EFabless/Skywater Caravel submission of an Analog Spiking Neuron Circuit. The submission also includes a SONOS transis…☆12Apr 21, 2023Updated 2 years ago
- The project includes SRAM In Memory Computing Accelerator with updates in design/circuits submitted previously in MPW7, by IITD researche…☆16Jan 6, 2023Updated 3 years ago
- An implementation of a quantum neural network built using pyquil.☆11Jun 7, 2019Updated 6 years ago
- EA-HAS-Bench: Energy-Aware Hyperparameter and Architecture Search Benchmark (ICLR Spotlight 2023)☆18Dec 8, 2024Updated last year
- ☆10Jan 19, 2026Updated last month
- "mmult" example using SDSoC for PYNQ board☆11Feb 23, 2017Updated 9 years ago
- A unified programming framework for high and portable performance across FPGAs and GPUs☆11Mar 23, 2025Updated 11 months ago
- DeepGate3 for ICCAD2024☆13May 26, 2025Updated 9 months ago
- [TVLSI 2025] ACiM Inference Simulation Framework in "ASiM: Modeling and Analyzing Inference Accuracy of SRAM-Based Analog CiM Circuits"☆27Sep 9, 2025Updated 5 months ago
- This repository integrates gem5 with Ramulator2, allowing gem5 to use Ramulator2 as its DRAM memory model. With the provided materials an…☆13Jun 7, 2025Updated 9 months ago
- ☆14Oct 11, 2024Updated last year
- Accelerate multihead attention transformer model using HLS for FPGA☆11Dec 7, 2023Updated 2 years ago
- Control Logic Synthesis: Drawing the Rest of the OWL☆13Jun 17, 2024Updated last year
- SIMPLE MAGIC: Synthesis and In-memory MaPping of Logic Execution for Memristor Aided loGIC☆15Jan 23, 2020Updated 6 years ago
- ☆12Apr 6, 2025Updated 11 months ago
- Run a MacOS (OSX) Virtual Machine in a Docker Container☆11Aug 23, 2023Updated 2 years ago