☆128Mar 19, 2026Updated this week
Alternatives and similar repositories for mlir-air
Users that are interested in mlir-air are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- An MLIR-based toolchain for AMD AI Engine-enabled devices.☆605Updated this week
- IREE plugin repository for the AMD AIE accelerator☆123Updated this week
- Xilinx Modifications to Halide☆13May 3, 2021Updated 4 years ago
- ☆17Updated this week
- Fork of LLVM to support AMD AIEngine processors☆190Updated this week
- DigitalOcean Gradient AI Platform • AdBuild production-ready AI agents using customizable tools or access multiple LLMs through a single endpoint. Create custom knowledge bases or connect external data.
- An MLIR-based compiler from C/C++ to AMD-Xilinx Versal AIE☆17Aug 5, 2022Updated 3 years ago
- An MLIR dialect to enable the efficient acceleration of ML model on CGRAs.☆65Oct 9, 2024Updated last year
- An open source branch of AIE API☆14Apr 30, 2025Updated 10 months ago
- The missing pieces (as far as boilerplate reduction goes) of the upstream MLIR python bindings.☆119Mar 4, 2026Updated 3 weeks ago
- ☆24Updated this week
- TPP experimentation on MLIR for linear algebra☆146Updated this week
- ARIES: An Agile MLIR-Based Compilation Flow for Reconfigurable Devices with AI Engines (FPGA 2025 Best Paper Nominee)☆60Mar 8, 2026Updated 2 weeks ago
- ☆25Jan 7, 2026Updated 2 months ago
- Conversions to MLIR EmitC☆135Dec 12, 2024Updated last year
- Simple, predictable pricing with DigitalOcean hosting • AdAlways know what you'll pay with monthly caps and flat pricing. Enterprise-grade infrastructure trusted by 600k+ customers.
- HeteroCL: A Multi-Paradigm Programming Infrastructure for Software-Defined Heterogeneous Computing (FPGA'19 Best Paper)☆340Apr 20, 2024Updated last year
- HeteroHalide: From Image Processing DSL to Efficient FPGA Acceleration☆15Sep 14, 2020Updated 5 years ago
- Bridging polyhedral analysis tools to the MLIR framework☆119Sep 9, 2023Updated 2 years ago
- A novel spatial accelerator for horizontal diffusion weather stencil computation, as described in ICS 2023 paper by Singh et al. (https:/…☆22Jul 27, 2023Updated 2 years ago
- Allo Accelerator Design and Programming Framework (PLDI'24)☆366Mar 13, 2026Updated last week
- A translation validation framework for MLIR☆96Mar 19, 2025Updated last year
- The Riallto Open Source Project from AMD☆85Apr 10, 2025Updated 11 months ago
- A scalable High-Level Synthesis framework on MLIR☆292May 15, 2024Updated last year
- C/C++ frontend for MLIR. Also features polyhedral optimizations, parallel optimizations, and more!☆606Jun 19, 2025Updated 9 months ago
- DigitalOcean Gradient AI Platform • AdBuild production-ready AI agents using customizable tools or access multiple LLMs through a single endpoint. Create custom knowledge bases or connect external data.
- CHARM: Composing Heterogeneous Accelerators on Heterogeneous SoC Architecture☆168Mar 12, 2026Updated 2 weeks ago
- ☆172Updated this week
- A graph linear algebra overlay☆52Apr 26, 2023Updated 2 years ago
- Python interface for MLIR - the Multi-Level Intermediate Representation☆272Nov 28, 2024Updated last year
- ☆62Mar 24, 2025Updated last year
- Intel® Extension for MLIR. A staging ground for MLIR dialects and tools for Intel devices using the MLIR toolchain.☆148Updated this week
- Rosetta: A Realistic High-level Synthesis Benchmark Suite for Software Programmable FPGAs (FPGA'18)☆170Nov 7, 2023Updated 2 years ago
- ☆17Feb 3, 2023Updated 3 years ago
- MaxEVA: Maximizing the Efficiency of Matrix Multiplication on Versal AI Engine (accepted as full paper at FPT'23)☆22Apr 17, 2024Updated last year
- 1-Click AI Models by DigitalOcean Gradient • AdDeploy popular AI models on DigitalOcean Gradient GPU virtual machines with just a single click and start building anything your business needs.
- Generate versal system design from ONNX model. AI engine kernels. Sub-microsecond speeds for autoencoders.☆17Dec 29, 2024Updated last year
- A Generic Distributed Auto-Tuning Infrastructure☆24Jul 29, 2021Updated 4 years ago
- ☆87Mar 5, 2024Updated 2 years ago
- PyTorch model to RTL flow for low latency inference☆131Mar 15, 2024Updated 2 years ago
- EQueue Dialect☆42Feb 3, 2022Updated 4 years ago
- HeteroCL-MLIR dialect for accelerator design☆42Sep 18, 2024Updated last year
- TAPA is a dataflow HLS framework that features fast compilation, expressive programming model and generates high-frequency FPGA accelerat…☆19Aug 26, 2024Updated last year