An alternative Vivado custom design example (to fully Vitis) for the User Logic Partition targeting VCK5000
☆13Jul 16, 2024Updated last year
Alternatives and similar repositories for vck5000_vivado_ulp
Users that are interested in vck5000_vivado_ulp are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- A novel spatial accelerator for horizontal diffusion weather stencil computation, as described in ICS 2023 paper by Singh et al. (https:/…☆22Jul 27, 2023Updated 2 years ago
- FPGA 2025 SAT Accel: A modern SAT Solver on FPGA Repository☆13Mar 13, 2025Updated last year
- An MLIR-based compiler from C/C++ to AMD-Xilinx Versal AIE☆17Aug 5, 2022Updated 3 years ago
- ☆16Oct 25, 2022Updated 3 years ago
- ☆26Feb 20, 2024Updated 2 years ago
- Managed hosting for WordPress and PHP on Cloudways • AdManaged hosting with the flexibility to host WordPress, Magento, Laravel, or PHP apps, on multiple cloud providers. Cloudways by DigitalOcean.
- ☆19Jul 12, 2024Updated last year
- The Riallto Open Source Project from AMD☆85Apr 10, 2025Updated 11 months ago
- OpenMP front-end based on LLVM for CGRAs☆10Oct 2, 2022Updated 3 years ago
- Differentiable Combinatorial Scheduling at Scale (ICML'24). Mingju Liu, Yingjie Li, Jiaqi Yin, Zhiru Zhang, Cunxi Yu.☆22Oct 31, 2024Updated last year
- IREE plugin repository for the AMD AIE accelerator☆123Updated this week
- Sources and instructions for building an Intel(r) Edison-based monitoring system witih motion detection and cloud/social connection☆20Aug 20, 2017Updated 8 years ago
- ☆25Jan 7, 2026Updated 2 months ago
- ETHZ Heterogeneous Accelerated Compute Cluster.☆38Oct 7, 2025Updated 5 months ago
- Simple MIDAS Examples☆12Nov 25, 2018Updated 7 years ago
- Bare Metal GPUs on DigitalOcean Gradient AI • AdPurpose-built for serious AI teams training foundational models, running large-scale inference, and pushing the boundaries of what's possible.
- 基于FPGA的FFT算法并行优化☆13Mar 7, 2024Updated 2 years ago
- Gaia DR3 has 6.6M quasar candidates! We construct a new quasar catalog for cosmology with them.☆10Feb 11, 2026Updated last month
- MaxEVA: Maximizing the Efficiency of Matrix Multiplication on Versal AI Engine (accepted as full paper at FPT'23)☆22Apr 17, 2024Updated last year
- Domain-Specific Architecture Generator 2☆22Oct 2, 2022Updated 3 years ago
- A Progam-Behavior-Guided Far Memory System☆36Oct 26, 2023Updated 2 years ago
- ☆31Feb 21, 2021Updated 5 years ago
- ☆36Aug 1, 2024Updated last year
- ☆129Updated this week
- ☆14May 15, 2023Updated 2 years ago
- Bare Metal GPUs on DigitalOcean Gradient AI • AdPurpose-built for serious AI teams training foundational models, running large-scale inference, and pushing the boundaries of what's possible.
- FITS to Azimuth/Elevation using Astrometry.net--calibrate and plate scale images☆12Feb 6, 2024Updated 2 years ago
- [WIP] A toy C compiler written in Rust☆16Mar 4, 2022Updated 4 years ago
- ☆26Feb 11, 2025Updated last year
- ☆26Oct 6, 2023Updated 2 years ago
- ☆24Nov 10, 2020Updated 5 years ago
- p4 controller in Rust☆12Feb 22, 2021Updated 5 years ago
- TFHE is a popular algorithm for homomorphic encryption. Staring with a C/C++ specification of TFHE to be provided, This project rewrite t…☆20May 27, 2024Updated last year
- [ICASSP'20] DNN-Chip Predictor: An Analytical Performance Predictor for DNN Accelerators with Various Dataflows and Hardware Architecture…☆25Oct 1, 2022Updated 3 years ago
- Hands-on experience programming AI Engines using Vitis Unified Software Platform☆40Jul 24, 2024Updated last year
- GPU virtual machines on DigitalOcean Gradient AI • AdGet to production fast with high-performance AMD and NVIDIA GPUs you can spin up in seconds. The definition of operational simplicity.
- ☆11Jan 2, 2026Updated 2 months ago
- ☆62Mar 24, 2025Updated last year
- ARIES: An Agile MLIR-Based Compilation Flow for Reconfigurable Devices with AI Engines (FPGA 2025 Best Paper Nominee)☆61Mar 8, 2026Updated 3 weeks ago
- 🍬 tiny OCaml compiler and PSan targeting to WebAssembly☆10Aug 15, 2024Updated last year
- Intel’s HERACLES accelerator introduces a new set of fundamental instructions, the Polynomial Instructions Set Architecture (P-ISA) that …☆62Feb 23, 2026Updated last month
- ArchExplorer: Microarchitecture Exploration Via Bottleneck Analysis☆33Feb 20, 2024Updated 2 years ago
- "Middleware" (infrastructure) for host-FPGA applications (e.g., accelerators)☆19Sep 26, 2024Updated last year