mortbopet / NetCrackerLinks
NetCracker is an FPGA architecture analysis tool for facilitating the investigation of connectivity patterns within as well as in between switchboxes
☆17Updated 4 years ago
Alternatives and similar repositories for NetCracker
Users that are interested in NetCracker are comparing it to the libraries listed below
Sorting:
- 55nm CMOS Open Source PDK by ICsprout Integrated Circuit Co., Ltd.☆114Updated last week
- RapidSmith2 - the Vivado successor to RapidSmith. Released Jan 4, 2017.☆42Updated 5 years ago
- Open source RTL simulation acceleration on commodity hardware☆32Updated 2 years ago
- Yosys plugin for logic locking and supply-chain security☆22Updated 7 months ago
- ☆33Updated 10 months ago
- fakeram generator for use by researchers who do not have access to commercial ram generators☆38Updated 2 years ago
- An automatic clock gating utility☆51Updated 7 months ago
- tools to help make the most of the limited space we have on the Google sponsored Efabless shuttles☆36Updated 2 years ago
- Characterizer☆30Updated 3 months ago
- An Open-Source Toolchain for Top-Metal IC Art and Ultra-High-Fidelity GDSII Renders☆19Updated 3 months ago
- ☆14Updated 5 months ago
- AMC: Asynchronous Memory Compiler☆51Updated 5 years ago
- A tool that converts SystemVerilog to Verilog. Uses Design Compiler, so it is 100% compatible.☆43Updated 2 years ago
- SystemVerilog frontend for Yosys☆170Updated last week
- SystemVerilog Linter based on pyslang☆31Updated 6 months ago
- SpiceBind – spice inside HDL simulator☆56Updated 4 months ago
- AutoSVA is a tool to automatically generate formal testbenches for unit-level RTL verification. The goal is to, based on annotations made…☆92Updated last year
- YosysHQ SVA AXI Properties☆43Updated 2 years ago
- Python/C/RTL cosimulation with Xilinx's xsim simulator☆76Updated 4 months ago
- sram/rram/mram.. compiler☆42Updated 2 years ago
- ☆10Updated 2 years ago
- Supplemental technology files for ASAP7 PDK with Synopsys design flow☆19Updated 2 years ago
- Making cocotb testbenches that bit easier☆36Updated 3 weeks ago
- An open source PDK using TIGFET 10nm devices.☆54Updated 2 years ago
- Project repo for the POSH on-chip network generator☆52Updated 8 months ago
- Workshop on Open-Source EDA Technology (WOSET)☆48Updated last year
- Open source process design kit for 28nm open process☆67Updated last year
- Open-source repository for a standard-cell library characterizer using complete open-source tools☆40Updated 3 months ago
- A configurable SRAM generator☆57Updated 3 months ago
- ☆43Updated 3 years ago