Alternatives and similar repositories for skywater-pdk-actions

Users that are interested in skywater-pdk-actions are comparing it to the libraries listed below

• google / skywater-pdk-libs-sky130_fd_sc_hd
  "High density" digital standard cells for SKY130 provided by SkyWater.
  ☆16Updated 2 years ago
• google / globalfoundries-pdk-libs-gf180mcu_fd_sc_mcu9t5v0
  9 track standard cells for GF180MCU provided by GlobalFoundries.
  ☆18Updated 2 years ago
• google / globalfoundries-pdk-libs-gf180mcu_fd_io
  IO and periphery cells for the GF180MCU provided by GlobalFoundries.
  ☆13Updated 2 years ago
• google / skywater-pdk-libs-sky130_fd_bd_sram
  SRAM build space for SKY130 provided by SkyWater.
  ☆22Updated 3 years ago
• google / skywater-pdk-libs-sky130_fd_pr
  Primitives for SKY130 provided by SkyWater.
  ☆27Updated last year
• google / skywater-pdk-libs-sky130_fd_io
  IO and periphery cells for SKY130 provided by SkyWater.
  ☆11Updated last year
• google / globalfoundries-pdk-libs-gf180mcu_fd_sc_mcu7t5v0
  7 track standard cells for GF180MCU provided by GlobalFoundries.
  ☆26Updated 2 years ago
• google / globalfoundries-pdk-ip-gf180mcu_fd_ip_sram
  SRAM macros created for the GF180MCU provided by GlobalFoundries.
  ☆17Updated 2 years ago
• google / globalfoundries-pdks
  Index of the fully open source process design kits (PDKs) maintained by Google for GlobalFoundries technologies.
  ☆48Updated 3 years ago
• google / skywater-pdk-libs-sky130_fd_pr_reram
  SKY130 ReRAM and examples (SkyWater Provided)
  ☆40Updated 3 years ago
• google / skywater-pdk-libs-sky130_bag3_pr
  BAG (BAG AMS Generator) Primitives Library for SKY130
  ☆18Updated 2 years ago
• google / globalfoundries-pdk-libs-gf180mcu_fd_pr
  Primitives for GF180MCU provided by GlobalFoundries.
  ☆51Updated last year
• google / skywater-pdk-sky130-raw-data
  Raw data collected about the SKY130 process technology.
  ☆58Updated 2 years ago
• google / verilogpp
  ☆17Updated last year
• verilator / verilator_ext_tests
  Extended and external tests for Verilator testing
  ☆16Updated 2 weeks ago
• SymbiFlow / vtr-verilog-to-routing
  SymbiFlow WIP changes for Verilog to Routing -- Open Source CAD Flow for FPGA Research
  ☆38Updated 11 months ago
• efabless / caravel_mgmt_soc_litex
  https://caravel-mgmt-soc-litex.readthedocs.io/en/latest/
  ☆28Updated 6 months ago
• verilog-to-routing / libsdcparse
  ☆12Updated 5 years ago
• Bryce-Readyhough / caravel_UNCC_MPW_1
  This is the Google/EFabless/Skywater Caravel submission of an Analog Spiking Neuron Circuit. The submission also includes a SONOS transis…
  ☆11Updated 2 years ago
• google / sky90fd-pdk
  ☆112Updated 2 years ago
• andrsmllr / magic_vlsi_examples
  Some simple examples for the Magic VLSI physical chip layout tool.
  ☆30Updated 4 years ago
• mabrains / OpenAnalogDesign
  Open Analog Design Environment
  ☆24Updated 2 years ago
• chiphackers / covered
  Covered is a Verilog code coverage utility using VCD/LXT/FST dumpfiles (or VPI interface) and the design to generate line, toggle, memory…
  ☆31Updated 6 years ago
• byuccl / tincr
  A Tcl-based CAD Tool Framework for Xilinx's Vivado Design Suite
  ☆43Updated 5 years ago
• d-m-bailey / cvc
  CVC: Circuit Validity Checker. Check for errors in CDL netlist.
  ☆23Updated last month
• YosysHQ / padring
  A padring generator for ASICs
  ☆25Updated 2 years ago
• sgherbst / sky130-hello-world
  Minimal SKY130 example with self-checking LVS, DRC, and PEX
  ☆23Updated 4 years ago
• thesourcerer8 / StdCellLib
  LibreSilicon's Standard Cell Library Generator
  ☆20Updated last year
• f4pga / ideas
  Random ideas and interesting ideas for things we hope to eventually do.
  ☆87Updated 3 years ago
• pradeepsk13 / vsdsram_sky130_1.8V
  Design of 4KB Static RAM 1.8V (access time <2.5ns) using OpenRAM and Sky130 node
  ☆13Updated 4 years ago