Alternatives and similar repositories for skywater-pdk-actions

Users that are interested in skywater-pdk-actions are comparing it to the libraries listed below

• google / skywater-pdk-libs-sky130_fd_sc_hd

  View on GitHub
  "High density" digital standard cells for SKY130 provided by SkyWater.
  ☆23Feb 22, 2023Updated 2 years ago
• google / skywater-pdk-libs-sky130_fd_io

  View on GitHub
  IO and periphery cells for SKY130 provided by SkyWater.
  ☆14Nov 29, 2023Updated 2 years ago
• google / globalfoundries-pdk-libs-gf180mcu_fd_sc_mcu9t5v0

  View on GitHub
  9 track standard cells for GF180MCU provided by GlobalFoundries.
  ☆18Dec 5, 2022Updated 3 years ago
• google / skywater-pdk-libs-sky130_bag3_pr

  View on GitHub
  BAG (BAG AMS Generator) Primitives Library for SKY130
  ☆20May 16, 2023Updated 2 years ago
• google / globalfoundries-pdk-ip-gf180mcu_fd_ip_sram

  View on GitHub
  SRAM macros created for the GF180MCU provided by GlobalFoundries.
  ☆19Apr 10, 2023Updated 2 years ago
• google / skywater-pdk-libs-sky130_fd_pr

  View on GitHub
  Primitives for SKY130 provided by SkyWater.
  ☆37Mar 9, 2024Updated last year
• samlittlewood / caravel_carrier

  View on GitHub
  Carrier for efabless Caravel chip used for Google/Skywater 130nm shuttle program.
  ☆18Sep 24, 2021Updated 4 years ago
• efabless / caravel-lite

  View on GitHub
  ☆17Nov 4, 2024Updated last year
• claude-abounegm / DEF-Viewer

  View on GitHub
  Parser and Viewer for Cadence® Library Exchange Format (LEF) and Design Exchange Format (DEF) integrated circuit (IC) description languag…
  ☆17May 31, 2023Updated 2 years ago
• google / bbcpu

  View on GitHub
  ☆17Nov 25, 2017Updated 8 years ago
• efabless / caravel_mgmt_soc_litex

  View on GitHub
  https://caravel-mgmt-soc-litex.readthedocs.io/en/latest/
  ☆29Jan 21, 2025Updated last year
• google / globalfoundries-pdk-libs-gf180mcu_fd_io

  View on GitHub
  IO and periphery cells for the GF180MCU provided by GlobalFoundries.
  ☆14Dec 3, 2022Updated 3 years ago
• lnis-uofu / TIGFET-10nm-PDK

  View on GitHub
  An open source PDK using TIGFET 10nm devices.
  ☆56Dec 19, 2022Updated 3 years ago
• TheOneKevin / icarusext

  View on GitHub
  iverilog extension for Visual Studio Code to satisfy the needs for an easy testbench runner. Includes builtin GTKWave support.
  ☆11Mar 4, 2023Updated 2 years ago
• google / globalfoundries-pdk-libs-gf180mcu_fd_sc_mcu7t5v0

  View on GitHub
  7 track standard cells for GF180MCU provided by GlobalFoundries.
  ☆27Dec 1, 2022Updated 3 years ago
• d-m-bailey / cvc

  View on GitHub
  CVC: Circuit Validity Checker. Check for errors in CDL netlist.
  ☆33Dec 25, 2025Updated last month
• verilator / verilator_ext_tests

  View on GitHub
  Extended and external tests for Verilator testing
  ☆17Jan 25, 2026Updated 3 weeks ago
• tdene / synth_opt_adders

  View on GitHub
  Prefix tree adder space exploration library
  ☆56Jan 27, 2026Updated 2 weeks ago
• efabless / chipignite-resources

  View on GitHub
  ☆86Nov 7, 2022Updated 3 years ago
• google / skywater-pdk-libs-sky130_fd_pr_reram

  View on GitHub
  SKY130 ReRAM and examples (SkyWater Provided)
  ☆44Apr 20, 2022Updated 3 years ago
• ericsonj / vscode-verilogformar

  View on GitHub
  ☆11Nov 18, 2025Updated 2 months ago
• rochus-keller / Verilog

  View on GitHub
  This is the Verilog 2005 parser used by VerilogCreator
  ☆15May 19, 2019Updated 6 years ago
• shalan / Chameleon_SoC

  View on GitHub
  AHB-Lite based SoC for IBEX/SWERV/VEXRISC/...
  ☆13Mar 28, 2025Updated 10 months ago
• RTimothyEdwards / irsim

  View on GitHub
  IRSIM switch-level simulator for digital circuits
  ☆36Nov 13, 2025Updated 3 months ago
• libresilicon / coriolis

  View on GitHub
  autorouter forked from https://www-soc.lip6.fr/git/coriolis.git
  ☆15May 21, 2018Updated 7 years ago
• mattvenn / caravel_user_project

  View on GitHub
  Zero to ASIC group submission for MPW2
  ☆13Mar 26, 2025Updated 10 months ago
• The-OpenROAD-Project / alpha-release

  View on GitHub
  Builds, flow and designs for the alpha release
  ☆54Dec 18, 2019Updated 6 years ago
• mattvenn / simulate-gate

  View on GitHub
  Project 1.1 Simulate a Skywater 130nm standard cell using ngspice
  ☆14Jul 18, 2025Updated 6 months ago
• iic-jku / osic-multitool

  View on GitHub
  JKU IIC OSIC-Multitool for open-source IC (OSIC) design for SKY130.
  ☆77Mar 28, 2025Updated 10 months ago
• tmeissner / vhdl_verification

  View on GitHub
  Examples and design pattern for VHDL verification
  ☆15Apr 10, 2016Updated 9 years ago
• rochus-keller / QtcVerilog

  View on GitHub
  This is a stand-alone Verilog IDE derived from a QtCreator 3.6.1 subset featuring the VerilogCreator plugin
  ☆21Aug 8, 2022Updated 3 years ago
• antmicro / verilator-old-archived

  View on GitHub
  ☆21Mar 5, 2023Updated 2 years ago
• pepijndevos / seqpu

  View on GitHub
  A bit-serial CPU
  ☆19Sep 29, 2019Updated 6 years ago
• ieee-ceda-datc / datc-rdf-calibrations

  View on GitHub
  ☆19Oct 28, 2024Updated last year
• laurentc2 / SKY130_for_KLayout

  View on GitHub
  KLayout technology files for Skywater SKY130
  ☆44Jul 19, 2023Updated 2 years ago
• thesourcerer8 / StdCellLib

  View on GitHub
  LibreSilicon's Standard Cell Library Generator
  ☆22Oct 30, 2025Updated 3 months ago
• mattvenn / logo-to-gds2

  View on GitHub
  ☆18Dec 15, 2022Updated 3 years ago
• hdl / symbolator

  View on GitHub
  Generate symbols from HDL components/modules
  ☆22Feb 6, 2023Updated 3 years ago
• chromium / auto-zoom

  View on GitHub
  Automatically zoom web pages based on their content
  ☆21Dec 17, 2015Updated 10 years ago