pepijndevos / seqpuLinks
A bit-serial CPU
☆19Updated 5 years ago
Alternatives and similar repositories for seqpu
Users that are interested in seqpu are comparing it to the libraries listed below
Sorting:
- Notes, scripts and apps to quickfeather board☆10Updated 3 years ago
- Programs for the FOMU, DE10NANO and ULX3S FPGA boards, written in Silice https://github.com/sylefeb/Silice☆35Updated last year
- 64-bit MISC Architecture CPU☆12Updated 8 years ago
- An example OMI Device FPGA with 2 DDR4 memory ports☆16Updated 2 years ago
- Yosys Plugins☆21Updated 5 years ago
- Project Trellis database☆13Updated last year
- Reusable Verilog 2005 components for FPGA designs☆43Updated 3 months ago
- Experiments with Yosys cxxrtl backend☆49Updated 4 months ago
- Minimal microprocessor☆20Updated 7 years ago
- A design for TinyTapeout☆16Updated 2 years ago
- Co-simulation and behavioural verification with VHDL, C/C++ and Python/m☆13Updated this week
- A reconfigurable logic circuit made of identical rotatable tiles.☆21Updated 3 years ago
- Open Processor Architecture☆26Updated 9 years ago
- ABC: System for Sequential Logic Synthesis and Formal Verification☆28Updated 3 weeks ago
- FPGA assembler! Create bare-metal FPGA designs without Verilog or VHDL (Not to self: use Lisp next time)☆53Updated 3 years ago
- Cross compile FPGA tools☆22Updated 4 years ago
- Finding the bacteria in rotting FPGA designs.☆14Updated 4 years ago
- Tool to parse yosys and nextpnr logfiles to then plot LUT, flip-flop and maximum frequency stats as your project progresses.☆21Updated last year
- A pipelined brainfuck softcore in Verilog☆19Updated 10 years ago
- S3GA: a simple scalable serial FPGA☆10Updated 2 years ago
- Bit streams forthe Ulx3s ECP5 device☆17Updated 2 years ago
- ☆22Updated 3 weeks ago
- There are many RISC V projects on iCE40. This one is mine.☆15Updated 4 years ago
- Picorv32 SoC that uses only BRAM, not flash memory☆13Updated 6 years ago
- shdl6800: A 6800 processor written in SpinalHDL☆26Updated 5 years ago
- RISC-V processor☆31Updated 3 years ago
- Small footprint and configurable HyperBus core☆11Updated 2 years ago
- IRSIM switch-level simulator for digital circuits☆34Updated last month
- A Verilog Synthesis Regression Test☆37Updated last year
- RISC-V RV64IS-compatible processor for the Kestrel-3☆21Updated 2 years ago