efabless / chipignite-resources
☆78Updated 2 years ago
Alternatives and similar repositories for chipignite-resources:
Users that are interested in chipignite-resources are comparing it to the libraries listed below
- This project describes how the PNR of an analog IP, 2:1 analog multiplexer is carried out by opensource EDA tools, Openlane. It also disc…☆42Updated 4 years ago
- Version manager (and builder) for the Google sky130 and gf180mcu open-source PDKs☆63Updated last week
- JKU IIC OSIC-Multitool for open-source IC (OSIC) design for SKY130.☆56Updated 2 months ago
- Documentation for the 5 day workshop: Advanced Physical Design using OpenLane/Sky130☆51Updated 2 years ago
- XSCHEM symbol libraries for the Google-Skywater 130nm process design kit.☆59Updated this week
- ☆108Updated last year
- FOSS-ASIC-TOOLS is all in one container for SKY130 based design both Analog and Digital. Below is a list of the current tools already ins…☆79Updated 4 months ago
- Design of 1024x32 SRAM (32Kbits) using OpenRAM and SKY130 PDKs with operating voltage of 1.8V and access time < 2.5ns☆63Updated 3 years ago
- ☆45Updated last month
- Curriculum for a university course to teach chip design using open source EDA tools☆57Updated last year
- This repository contains all the information needed to run RTL2GDSII flow using openlane flow. Apart from that, it also contain procedure…☆64Updated 4 years ago
- Netgen complete LVS tool for comparing SPICE or verilog netlists☆112Updated last week
- ☆31Updated last week
- This repository contains all the contents studied and created during the Advanced Physical Design Workshop using OpenLANE and SKY130 PDK☆35Updated 2 years ago
- ☆40Updated 2 years ago
- A PULP SoC for education, easy to understand and extend with a full flow for a physical design.☆44Updated last week
- Standard Cell Library based Memory Compiler using FF/Latch cells☆138Updated 7 months ago
- IEEE Solid-State Circuits Society (SSCS) Open-Source Ecosystem (OSE)☆164Updated 3 weeks ago
- ☆71Updated this week
- Open Source tool to build liberty files and for Characterizing Standard Cells.☆24Updated 3 years ago
- Plugins for Yosys developed as part of the F4PGA project.☆80Updated 8 months ago
- 8x PLL Clock Multiplier IP with an input frequency range of 5Mhz to 12.5Mhz and output frequency range of 40Mhz to 100Mhz, giving a 8x mu…☆109Updated 3 years ago
- This project is done in the course of "Advanced Physical Design using OpenLANE/Sky130" workshop by VLSI System Design Corporation. In thi…☆40Updated 3 years ago
- ☆53Updated last year
- OpenROAD users should look at this repository first for instructions on getting started☆102Updated 3 years ago
- Create fast and efficient standard cell based adders, multipliers and multiply-adders.☆110Updated last year
- This repository in a walk through the entire process of PLL IC designing from the tools to the final tapeout.☆19Updated 2 years ago
- tools to help make the most of the limited space we have on the Google sponsored Efabless shuttles☆35Updated 2 years ago
- Open source process design kit for 28nm open process☆46Updated 8 months ago
- KLayout technology files for Skywater SKY130☆39Updated last year